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【正文】 imer 0 and Timer1 Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. For further information on the timers’ operation, please click on the document link below: 4. Timer 2 Timer 2 is a 16bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 52). Timer 2 has three 4 operating modes: capture, autoreload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 101. Timer 2 consists of two 8bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. 5. Interrupts The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows. Reference data: 1. the ATMEL pany AT89S52 technical manuals Development Co., Ltd. AT89C52 Datasheets source SCM University Press, singlechip microprocessor theory, application and test ZHANG Youde, etc 5 譯文： 微控制器 AT89S52 主要性能 ? 與 MCS51 單片機產(chǎn)品兼容 ? 8K 字節(jié)在系統(tǒng)可編程 Flash 存儲器 ? 1000次擦寫周期 ? 至 的工作電壓 ? 全靜態(tài)操作： 0Hz～ 33Hz ? 三級加密程序存儲器 ? 256 8 位內(nèi)部 RAM 的 ? 32個可編程 I/O口線 ? 三個 16位定時器 /計數(shù)器 ? 八個中斷源 ? 全雙工 UART串行通道 ? 低功耗空閑和掉電模式 ? 掉電后中斷可喚醒 ? 看門狗定時器 ? 雙
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