【正文】 t in a Fourier series. The Fourier series coefficients define the impulse response and therefore the coefficients of the FIR 外文翻譯（原文） 9 filter. However, the impulse response must be truncated and windowed as in the previous method. After truncation and windowing, an FFT is used to generate the corresponding frequency response. The frequency response can be modified by choosing different window functions, although precise control of the stopband characteristics is difficult in any method which uses windowing. FIR Filter Design Using the Frequency Sampling Method This method is extremely useful in generating an FIR filter with an arbitrary frequency response. H(f) is specified as a series of amplitude and phase points in the frequency domain. The points are then converted into real and imaginary ponents. Next, the impulse response is obtained by taking the plex inverse FFT of the frequency response. The impulse response is then truncated to N points,and a window function is applied to minimize the effects of truncation. The filter design should then be tested by taking its FFT and evaluating the frequency response. Several iterations may be required to achieve the desired response. 外文翻譯（ 譯 文） 10 數(shù)字濾波器 數(shù)字濾波 器 是數(shù)字信號(hào)處理（ DSP）的最強(qiáng)大的工具 之一 。外文翻譯（原文） 2 execute a plete filter tap multiplyaccumulate instruction in . The ADSP2189M requires N+5 instructions for an Ntap filter. For a 100tap filter, the total execution time is approximately . This corresponds to a maximum possible sampling frequency of 714kHz, thereby limiting the upper signal bandwidth to a few hundred kHz. However, it is possible to replace a general purpose DSP chip and design special hardware digital filters which will operate at videospeed sampling rates. In other cases, the speed limitations can be overe by first storing the high speed ADC data in a buffer memory. The buffer memory is then read at a rate which is patible with the speed of the DSPbased digital filter. In this manner, pseudorealtime operation can be maintained as in a radar system, where signal processing is typically done on bursts of data collected after each transmitted pulse. Another option is to use a thirdparty dedicated DSP filter engine like the Systolix PulseDSP filter core. The AD7725 16bit sigmadelta ADC has an onchip PulseDSP filter which can do 125 million multiplyaccumulates per second. Even in highly oversampled sampled data systems, an analog antialiasing filter is still required a ADC and a reconstruction filter after the DAC. Finally, as signal frequencies increase sufficiently, they surpass the capabilities of available ADCs, and digital filtering then bees impossible. Active analog filtering is not possible at extremely high frequencies because of op amp bandwidth and distortion limitations, and filtering requirements must then be met using purely passive ponents. The primary focus of the following discussions will be on filters which can run in realtime under DSP program control. As an example, consider the parison between an analog and a digital filter shown in Figure 2. The cutoff frequency of the both filters is 1kHz. The analog filter is realized as a 6pole Chebyshev Type 1 filter (ripple in passband, no ripple in stopband). In practice, this filter would probably be realized using three 2pole stages, each of which requires an op amp, and several resistors and capacitors. The 6pole design is certainly not trivial, and maintaining the ripple specification requires accurate ponent selection and matching. On the other hand, the digital FIR filter shown has only passband 外文翻譯（原文） 3 ripple,linear phase, and a much sharper roll off. In fact, it could not be realized using analog techniques! In a practical application, there are many other factors to consider when evaluating analog versus digital filters. Most modern signal processing systems use a bination of analog and digital techniques in order to acplish the desired function and take advantage of the best of both the analog and the digital world. There are many applications where digital filters must operate in realtime. This places specific requirements on the DSP depending upon the sampling frequency and the filter plexity. The key point is that the DSP must finish all putations during the sampling period so it will be ready to process the next data sample. Assume that the analog signal bandwidth to be processed is f a . This a requires the ADC sampling frequency f s to be at least 2fa . The sampling period is 1/f s . All DSP filter putations must be pleted during this interval. The putation time depends on the number of taps in the filter and the speed and efficiency of the DSP. Each tap on the filter requires one multiplication and one addition (multiplyaccumulate). DSPs are generally optimized to perform fast multiplyaccumulates。 FINITE IMPULSE RESPONSE (FIR) FILTERS There are two fundamental types of digital filters: finite impulse response (FIR) and infinite impulse response (IIR). As the terminology suggests, these classifications refer to the filter!ˉs impulse response. By varying the weight of the coefficients an the number of filter taps, virtually any frequency response characteristic can be realized with an FIR filter. As has been shown, FIR filters can achieve performance levels which are not possible with analog filter techniques (such as perfect linear phase response). However, high performance FIR filters generally require a large number of multiplyaccumulates and therefore require fast and efficient DSPs. On the other hand, IIR filters tend to mimic the performance of traditional analog filters and make use of feedback. Therefore their impulse response extends over an infinite period of time. Because of feedback, IIR filter