【正文】 L programming all the functions of the underlying modules, toplevel design plete with a graphic input. Using the code that in a clear to describe the plex controlled logic design, and the design of multiple description paper mainly describes the idea of modular design and state diagrams method applied in the microwave oven controller, and demonstrate its MAX + plusII under some simulation results to obtain the correct function of the system to achieve and made with the development of visual display, reflecting hardware description language in the electronic design automation (EDA) to facilitate application in. So make the design more practical value. Keywords: microwave oven controller VHDL state machine MAX + plusII simulation VI 目錄 摘要 .............................................................................................................................................. IV Abstract....................................................................................................................................... V 第一章 引言 ............................................................................................................................... 1 研究背景 ................................................................................................................................... 1 產(chǎn)品背景介紹 ........................................................................................................ 1 國(guó)內(nèi)產(chǎn)品發(fā)展現(xiàn)狀 ................................................................................................ 1 產(chǎn)品發(fā)展趨勢(shì) ........................................................................................................ 1 第二章 概述 ............................................................................................................................... 3 VHDL 簡(jiǎn)介 ............................................................................................................................... 3 VHDL 的特點(diǎn) ........................................................................................................ 3 VHDL 的設(shè)計(jì)步驟 ................................................................................................ 4 VHDL 的設(shè)計(jì)簡(jiǎn)述 ................................................................................................ 5 VHDL 的描述風(fēng)格 ................................................................................................ 5 FPGA 介紹 ................................................................................................................................ 6 發(fā)展歷史 ............................................................................................................... 6 FPGA 的基本特點(diǎn) ................................................................................................. 7 FPGA 的優(yōu)點(diǎn) ......................................................................................................... 8 Max+plusⅡ介紹 ....................................................................................................................... 8 第三章 系統(tǒng)設(shè)計(jì) .................................................................................................................... 10 系統(tǒng)設(shè)計(jì)要求 ...................................................................................................................... 10 系統(tǒng)設(shè)計(jì)方案 ...................................................................................................................... 10 微波爐控制器的總體設(shè)計(jì)方案 ....................................................................... 10 狀態(tài)控制器 KZQ 的設(shè)計(jì) ................................................................................. 11 數(shù)據(jù)裝載器 ZZQ 的設(shè)計(jì) ................................................................................. 12 烹調(diào)計(jì)時(shí)器 JSQ 的設(shè)計(jì) .................................................................................. 12 顯示譯碼器 YMQ47 的設(shè)計(jì) ............................................................................ 13 主要 VHDL 源程序 ............................................................................................................. 14 狀態(tài)控制器 KZQ 的 VHDL 源程序 ................................................................ 14 南昌工程學(xué)院（本）畢業(yè)設(shè)計(jì)（論文） VII 數(shù)據(jù)裝載器 ZZQ 的 VHDL 源程序 ................................................................ 16 顯示譯碼器 YMQ47 的