機電自動化專業(yè)畢業(yè)設(shè)計(論文)外文資料翻譯(已修改)
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【正文】 畢業(yè)設(shè)計 (論文 ) 英 文資料翻譯 學(xué)生姓名： 學(xué) 號： 1403134332 系 別 ： 機 電 系 專 業(yè)： 自動化 指導(dǎo)教師： 20xx 年 5 月 18 日 1 AT89C51（ 8bit Micro controller with 4K Bytes Flash） Features ? Compatible with MCS51? Products ? 4K Bytes of InSystem Reprogrammable Flash Memory ? Endurance: 1,000 Write/Erase Cycles ? Fully Static Operation: 0 Hz to 12 MHz ? 256 x 8bit Internal RAM ? 32 Programmable I/O Lines ? two 16bit Timer/Counters ? five Interrupt Sources ? Programmable Serial Channel ? Lowpower Idle and Powerdown Modes Description The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard 80C51 and 80C51 instruction set and pin out. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications. PinConfigurations The AT89C51 provides the following standard features: 4Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, two 16bittimer/counters, a sixvector twolevel interrupt architecture, a fullduplex serial port, onchip oscillator, and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Powerdown mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset. Pin Description 2 VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode, P0
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