【正文】
摘要 數(shù)字頻率計(jì)是直接用十進(jìn)制數(shù)字來(lái)顯示被測(cè)信號(hào)頻率的一種測(cè)量裝置。它不僅可以測(cè)量正弦波、方波、三角波、尖脈沖信號(hào)和其他具有周期特性的信號(hào)的頻率,而且還可以測(cè)量它們的周期。經(jīng)過(guò)改裝,可以測(cè)量脈沖寬度,做成數(shù)字式脈寬測(cè)量?jī)x;可以測(cè)量電容做成數(shù)字式電容測(cè)量?jī)x;在電路中增加傳感器,還可以做成數(shù)字脈搏儀、計(jì)價(jià)器等。因此數(shù)字頻率計(jì)在測(cè)量物理量方面應(yīng)用廣泛。本設(shè)計(jì)用VHDL在CPLD器件上實(shí)現(xiàn)數(shù)字頻率計(jì)測(cè)頻系統(tǒng),能夠用十進(jìn)制數(shù)碼顯示被測(cè)信號(hào)的頻率,能夠測(cè)量正弦波、方波和三角波等信號(hào)的頻率,而且還能對(duì)其他多種物理量進(jìn)行測(cè)量。具有體積小、可靠性高、功耗低的特點(diǎn)。數(shù)字頻率計(jì)是計(jì)算機(jī)、通訊設(shè)備、音頻視頻等科研生產(chǎn)領(lǐng)域不可缺少的測(cè)量?jī)x器。采用VDHL編程設(shè)計(jì)實(shí)現(xiàn)的數(shù)字頻率計(jì),除被測(cè)信號(hào)的整形部分、鍵輸入部分和數(shù)碼顯示部分以外,其余全部在一片F(xiàn)PGA芯片上實(shí)現(xiàn),整個(gè)系統(tǒng)非常精簡(jiǎn),而且具有靈活的現(xiàn)場(chǎng)可更改性。在不更改硬件電路的基礎(chǔ)上,對(duì)系統(tǒng)進(jìn)行各種改進(jìn)還可以進(jìn)一步提高系統(tǒng)的性能。該數(shù)字頻率計(jì)具有高速、精確、可靠、抗干擾性強(qiáng)和現(xiàn)場(chǎng)可編程等優(yōu)點(diǎn)。關(guān)鍵詞:FPGA芯片、VHDL語(yǔ)言、數(shù)字頻率計(jì)、數(shù)字頻率計(jì)原理圖、EDA技術(shù)AbstractDigital cymometer is to directly show to be measured a kind of diagraph of signal frequency to equip with the decimal system not only can measure sine wave, square wave, triangle wave, sharp pulse signal and other have a period of the frequency of the signal of characteristic, and can also measure their been refitted, can measure pulse width, make into the number type vein breadth to measure an instrument。Can measure electric capacity to make into a number type the electric capacity measure an instrument。Increase to spread a feeling machine in the electric circuit, can also make into a number pulse instrument, account a price machine etc..Therefore the digital cymometer accounts in the diagraph physics to measure aspect applied design is used VHDL the spare part is at CPLD up carry out digital cymometer to account to measure repeatedly system, can show to be measured the frequency of signal with the decimal system figures, can measure the frequency of sine wave, square wave and triangle wave etc. signal, and return an ability as to it39。s he various physical quantity carry on the physical volume small and dependable sex Gao and achievement to consume a low cymometer is the diagraph instrument of research production realm indispensabilities, such as calculator, munication equipments and audio frequency video frequency...etc..The digital cymometer that adopts VDHL to weave a distance to design a realization accounts, in addition to is measured the orthopedics of signal part, the key importation part and figures show part, rest all in one FPGA realization of chip, the whole system simplifies very much, and has vivid spot to change the foundation that doesn39。t change hardware electric circuit, carries on various function that the improvement can also raise system further to the number39。s frequency accounts to have high speed, precision, credibility, the anti interference is strong and the spot programmable etc. advantage.Key words: The FPGA chip, VHDL language and digital cymometer, the digital cymometer account principle diagram ,EDA technique目錄引言 1技術(shù)性能指標(biāo)及分工 2第1章 頻率計(jì)的設(shè)計(jì)背景及原理 3 設(shè)計(jì)背景 3 設(shè)計(jì)原理 3 頻率計(jì)設(shè)計(jì)原理 3 原理框圖 4 設(shè)計(jì)思路 5第2章 頻率計(jì)測(cè)量頻率的層次化設(shè)計(jì)方案 6 6 7 9 24位鎖存器 11 數(shù)碼管控制器 12 譯碼器 14 16總結(jié) 20心得體會(huì) 21參考文獻(xiàn) 22附錄 2324引言所謂頻率,就是周期性信號(hào)在單位時(shí)間(1s)里變化的次數(shù)。本頻率計(jì)設(shè)計(jì)測(cè)量頻率的基本原理是,首先讓被測(cè)信號(hào)與標(biāo)準(zhǔn)信號(hào)一起通過(guò)一個(gè)閘門,然后用計(jì)數(shù)器計(jì)數(shù)信號(hào)脈沖的個(gè)數(shù),把標(biāo)準(zhǔn)時(shí)間內(nèi)的計(jì)數(shù)的結(jié)果,用鎖存器鎖存起來(lái),最后用顯示譯碼器,把鎖存的結(jié)果用LED數(shù)碼顯示管顯示出來(lái)。根據(jù)數(shù)字頻率計(jì)的基本原理,本設(shè)計(jì)方案分三個(gè)模塊來(lái)實(shí)現(xiàn)其功能,即整個(gè)數(shù)字頻率計(jì)系統(tǒng)分為時(shí)基產(chǎn)生與測(cè)頻