lecture12asequentiallogicdesignsupplementarynotes講座12a時(shí)序邏輯設(shè)計(jì)的補(bǔ)充說(shuō)明(已修改)
2025-01-24 08:14 本頁(yè)面
【正文】 CS1104 Digital Logic Design Lecture 12 Sequential Logic Design Supplementary Notes CS110412a Design: Example 3 2 Design: Example 3 ? Design with unused states. Pr esen t N ext state I n p u t state F l i p f l o p i n p u ts Ou tp u t A B C x A+ B+ C+ SA RA SB RB SC RC y 0 0 1 0 0 0 1 0 X 0 X X 0 0 0 0 1 1 0 1 0 0 X 1 0 0 1 0 0 1 0 0 0 1 1 0 X X 0 1 0 0 0 1 0 1 1 0 0 1 0 0 1 0 X 0 0 1 1 0 0 0 1 0 X 0 1 X 0 0 0 1 1 1 1 0 0 1 0 0 1 0 1 0 1 0 0 0 1 0 1 X 0 0 X 1 0 0 1 0 0 1 1 0 0 X 0 0 X 0 X 1 1 0 1 0 0 0 1 0 1 0 X X 0 0 1 0 1 1 1 0 0 X 0 0 X 0 1 1 Given these Derive these 0 0 0 0 X X X X X X X X X X0 0 0 1 X X X X X X X X X XUnused state 000:
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