【正文】
FF 0x5000_0000 0x3FFF_FFFF 0x0000_0000 19 AHB信號(hào) 20 基本 AHB信號(hào) HRESETn 低電平有效 HADDR[31:0] 32位系統(tǒng)地址總線 HWDATA[31:0] 寫數(shù)據(jù)總線,從主設(shè)備寫到從設(shè)備 HRDATA[31:0] 讀數(shù)據(jù)總線,從從設(shè)備讀到主設(shè)備 21 基本 AHB信號(hào)(續(xù)) HTRANS 指出當(dāng)前傳輸?shù)臓顟B(tài) NONSEQ、 SEQ、 IDLE、 BUSY HSIZE 指出當(dāng)前傳輸?shù)拇笮? HBURST 指出傳輸?shù)?burst類型 HRESP 從設(shè)備發(fā)給主設(shè)備的總線傳輸狀態(tài) OKAY、 ERROR、 RETRY、 SPLIT HREADY 高:從設(shè)備指出傳輸結(jié)束 低電平:從設(shè)備需延長(zhǎng)傳輸周期 22 基本 AHB傳輸 兩個(gè)階段 地址周期,只有一個(gè) cycle 數(shù)據(jù)周期,由 HREADY信號(hào)決定需要幾個(gè)cycle 流水線傳送 先是地址周期,然后是數(shù)據(jù)周期 23 Master release address and control Slave sample the address and control Master sample the data If slave hasn’t ready to receive data, how to do? 基本 AHB傳輸(續(xù)) 一次無(wú)需等待狀態(tài)的簡(jiǎn)單傳輸 24 Not ready Not ready Ready One transfer need at least two cycles, how to promote its efficiency? Note: slave shouldn’t insert more than 16 wait cycles!!! 基本 AHB傳輸(續(xù)) 需要兩個(gè)等待周期的簡(jiǎn)單傳輸 25 Pipeline A Address A Data B Address B Data C Address C Data Slave decodes every transfer, so many waits, how to decrease the wait cycles? 基本 AHB傳輸(續(xù)) 26 Burst Transfer A A A+4 A+4 A+8 A+8 A+12 A+12 HBURST shows the burst types: Single Transfer Incrementing transfer with unspecified length( INCR) 4beat 8beat 16beat Slave has know that master need 4 data, A/A+4/A+8/A+12 During burst transfer, if slave not ready, then hready=0。 but if master is not ready, how to do? 基本 AHB傳輸(續(xù)) 27 傳輸類型 HTRANS[1:0]:當(dāng)前傳輸?shù)臓顟B(tài) IDLE、 BUSY、 NONSEQ、 SEQ 00: IDLE 主設(shè)備占用總線,但沒(méi)進(jìn)行傳輸 兩次 burst傳輸中間主設(shè)備發(fā) IDLE 01: BUSY 主設(shè)備占用總線,但是在 burst傳輸過(guò)程中還沒(méi)有準(zhǔn)備好進(jìn)行下一次傳輸 一次 burst傳輸中間主設(shè)備發(fā) BUSY 28 傳輸類型(續(xù)) 10: NOSEQ 表明一次單個(gè)數(shù)據(jù)的傳輸 或者一次 burst傳輸?shù)牡谝粋€(gè)數(shù)據(jù) 地址和控制信號(hào)與上一次傳輸無(wú)關(guān) 11: SEQ 表明 burst傳輸接下來(lái)的數(shù)據(jù) 地址和上一次傳輸?shù)牡刂肥窍嚓P(guān)的 29 The first transfer Master is busy The subsequent transfer The subsequent transfer Slave is not ready The subsequent transfer 傳輸類型舉例 30 其它 AHB控制信號(hào) HWRITE 高電平:寫 低電平:讀 HSIZE[2:0] 000:8bits 100:128bits 001:16bits 101:256bits 010:32bits 110:512bits 011:64bits 111:1024bits 最大值受總線的配置所限制 通常使用 32bits( 010) 31 其它 AHB控制信號(hào)(續(xù)) HPROT[3:0] HPROT[0]: OPCODE/DATA HPROT[1]: USER/PRIVILGED HPROT[2]: Bufferable/NonBufferable HPROT[3]: Cacheable/NonCacheable 32 AHB控制信號(hào)小結(jié) HTRANS[1:0] IDLE BUSY NONSEQ SEQ HBURST[2:0] SINGLE INCR WRAP[4|8|16] INCR[4|8|16] HSIZE[2:0] Byte Halfword Word Doubleword ... HPROT[3:0] 0 data/opcode 1 privileged/user 2 bufferable 3