【正文】 atamodulated signal. The spreading codes used in spreadspectrum systems are either maximallength sequence codes, sometimes called msequence codes, or Gold codes. Gold codes are binations of maximallength codes invented by Magnavox Corporation in 1967 especially for multipleaccess CDMA applications .There is a relatively large set of Glod codes available with minimal correlation between chip a reasonable number of satellite users,it is impossible to achieve perfectly orthogonal can only design for a minimum cross correlation among chips. One of the advantages of CDMA was that the entire bandwidth of a satellite channel or system may be used for each transmission from every earth station. For our example, the chip rate was six times the original bit rate. Consequently, the actual transmission rate of information was onesixth of the PSK modulation rate,and the bandwidth required is six times that required to simply transmit the original data as binary. Because of the coding inefficiency resulting from transmitting chips for bits, the advantage of more bandwidth is partially offset and is, thus, less of an advantage. Also, if the transmission of chips from various earth station must be synchronized, precise timing is required for the system to work. Therefore, the disadvantage of requiring time synchronization in TDMA systems is also present with CDMA. In short, CDMA is not all that it is cracked up to most significant advantage of CDMA is immunity to interference, which makes CDMA ideally suited for military applications Pseudorandom Noise Sequences In CDMA systems, PN sequences are used to 佳木斯大學(xué)學(xué)士學(xué)位論文 28 佳木斯大學(xué)信息電子技術(shù)學(xué)院 Spread the bandwidth of the modulated signal to the larger transmission bandwidth Distinguish between the different user signals by utilizing the same transmission bandwidth in the multiple access scheme. PN squences are not random。 1/4 are of length 2。 and so on. If a PN sequence is shifted by any nonzero number of elements, the resulting sequence will have an equal number of agreements and disagreements with respect to the original sequence. PN sequence are generated by bining the outputs of feedback shift registers. A feedback shift register consists of consecutive twostage memory or storage stages and feedback lobic. Binary sequences are shifted register in response to clock pulses. The contents of the stages are olgically bined to produce the input to the first stage. The initial contents of the stages and feedback olgic determine the successive contents of the stages. A feedback shift register and its output are called linear when t he feedback logic consists entirely of modulo2 adders. To demonstrate the properties of a PN a binary sequence, we consider a linear feedback shift register(see Fig. 1) that has a four stage register for storage and shifting, a modulo2 adder, and a feedback path from adder to the input of the operation of the shift register is controlled by a sequence of clock pulses. At each clock pulse the contents of each stage in the register is shifted by one stage to the right. Also, at each clock pulse the contents of stages x3 and x4 are modulo2 added, and the result is fed back to stage x1. The shift register sequence is defined to be the output of stage x4. W assume that stage x1 is initially filled with a 0 and the other remaining stages are filled with 0, 0, and 1。 the numbers differ by 1. If a linear feedback shift register reached the 0 state an some time, it would always remain in the 0 state and the output sequence would subsequently be all 0s. 佳木斯大學(xué)學(xué)士學(xué)位論文 29 佳木斯大學(xué)信息電子技術(shù)學(xué)院 Since there are exactly 2n1 nonzero states, the period of a linear nstage shift register output sequence can not exceed 2n1. The output sequences are classified as either maximal length or nonmaximal length. Maximallength sequences are the longest sequences that can be generated by a given shift register of a given length. In the binary shift register sequence generators, the maximal length sequence is 2n1 chips, where n is the number of stages in the shift registers. Maximallength sequences have this property for an nstage linear feedback shift register: the sequence repetition period in clock pulses is T 0=2n1. If a linear feedback shift register generates a maximal sequence, then all of its nonzero output sequences are maximal, regardless of the initial stage. A maximal sequence contains(2n11) 0s and (2n1) 1s per period. Shift Stage X1 Stage X2 Stage X3 Stage X4 Output sequence 0 0 0 0 1 1 1 1 0 0 0 0 2 0 1 0 0 0 3 0 0 1 0 0 4 1 0 0 1 1 5 1 1 0 0 0 6 0 1 1 0 0 7 1 0 1 1 1 8 0 1 0 1 1 9 1 0 1 0 0 10 1 1 0 1 1 11 1 1 1 0 0 12 1 1 1 1 1 13 0 1 1 1 1 14 0 0 1 1 1 15 0 0 0 1 1 16 1 0 0 0 0 Table 1 Results of Shifting after Each Cycle 佳木斯大學(xué)學(xué)士學(xué)位論文 30 佳木斯大學(xué)信息電子技術(shù)學(xué)院 譯文 偽隨機(jī)序列 直接序列 (DS)。擴(kuò)頻碼元的傳送速率 Rcw=1/Tc， 這里的 Tc 是單個(gè)雙極性脈沖的周期 (即碼片 )。 結(jié)果，使用擴(kuò)頻碼調(diào)制而輸出的信號(hào)頻譜比開始的 PSK 數(shù)據(jù)調(diào)制的 基帶信號(hào)帶寬寬 100 到 1000 倍。 Gold 碼是在 1967 年由 Magnavox 公司發(fā)明的最大長(zhǎng)度密碼的組，它尤其是為了CDMA 多址技術(shù)的應(yīng)用而生的， Glod 碼之間有較小的相關(guān)性的而卻可得到較長(zhǎng)的碼長(zhǎng)。我們只能盡量設(shè)計(jì)出相對(duì)較小相關(guān)性的碼序列。 例如，碼 速是原始比特率的六倍， 結(jié)果數(shù)據(jù)的真實(shí)傳輸率只是 PSK 調(diào)制速率的六分之一， 而且所需要的帶寬是僅僅是傳輸最初的二進(jìn)制數(shù)據(jù)帶寬的六倍。 同時(shí)，如果來自地球不同站點(diǎn)的所傳輸?shù)拇a元一定要同步，就需要精確的時(shí)間同步性來保證系統(tǒng)的工作運(yùn)行。簡(jiǎn)而言之， CDMA 并不是沒有任何的缺點(diǎn)，它最重要的優(yōu)勢(shì)就在于它抗干擾性比較強(qiáng)，正因?yàn)檫@個(gè) 特點(diǎn)，使得 CDMA 系統(tǒng)很適合軍事應(yīng)用。 在多址方案中利用相同的傳輸帶寬區(qū)別不同的使用者信號(hào)。下面是理想的 PN 序列的三佳木斯大學(xué)學(xué)士學(xué)位論文 31 佳木斯大學(xué)信息電子技術(shù)學(xué)院 個(gè)主要特性： （ 1） 0 和 1 出現(xiàn)的概率相對(duì)各為 1/2。 （ 3） 如果 PN 序列是被任何非零數(shù)字來循環(huán)，產(chǎn)生的序列將會(huì)有有關(guān)于最初的序列一個(gè)相符或不符的相等數(shù)字。一個(gè)移位反饋寄存器是由連續(xù)的記憶級(jí)和一個(gè)反饋邏輯組成。 每一級(jí)的狀態(tài)通過一定的邏輯組合和運(yùn)算從而給第一級(jí)產(chǎn)生一個(gè)輸入。當(dāng)一個(gè)反饋移位寄存器的反饋邏輯完全由模二加法器組成的時(shí)候 ,我們稱它和它的輸出是線性的。移位寄存器的工作是通過一個(gè)時(shí)鐘脈沖序列來控制的。同時(shí)，在每個(gè)時(shí)鐘跳動(dòng)下第三級(jí)的狀態(tài)通過模二加法器與第四級(jí)的狀態(tài)相加后再將其狀態(tài)反饋到第一級(jí)?，F(xiàn)在，我們假設(shè)把第一級(jí)寄存器的狀態(tài)置位為 0 電平，而其他的則保 持在 0,0,1,這樣寄存器的開始狀態(tài)是 0 0 0 1。 我們注意到寄存器的內(nèi)容在 241=15 周期之后重復(fù)。在輸出序列中， 0 狀態(tài)出現(xiàn)的總數(shù)是 7 ，而 1 狀態(tài)出現(xiàn)的次數(shù)是 8； 1 的次數(shù)正好比 0 出現(xiàn)的次