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基于msp430的直流電機(jī)調(diào)速系統(tǒng)-閱讀頁(yè)

2025-07-03 16:48本頁(yè)面
  

【正文】 零輸入,它是為使不希望顯示的0熄滅而設(shè)定的。其結(jié)果和加入滅燈信號(hào)的結(jié)果一樣,將0熄滅。圖312 LED與單片機(jī)接口的硬件圖由圖312可以看出,、分別與74LS47的A、B、C和D引腳相接。、電機(jī)正轉(zhuǎn);,電機(jī)反轉(zhuǎn)。所使用的三極管是9014,該三極管是NPN管,當(dāng)給它一個(gè)高電平時(shí)就導(dǎo)通,給它低電平時(shí)截止。這樣做可以保證LED能正常地工作。圖313 測(cè)速電路如圖313所示,將CD40106的輸入引腳1與CS3020的輸出端相連,對(duì)脈沖進(jìn)行計(jì)數(shù),引腳14接電源,引腳7接地。選用霍爾元件CS3020作為測(cè)速的傳感器,在電機(jī)轉(zhuǎn)軸的圓周上黏上磁鋼,讓霍爾開關(guān)靠近磁鋼,轉(zhuǎn)軸旋轉(zhuǎn)時(shí),就會(huì)不斷有信號(hào)脈沖輸出。將輸出的兩個(gè)脈沖經(jīng)過施密特反相器,最后將脈沖反饋到單片機(jī)進(jìn)行計(jì)數(shù)。該探頭由霍爾元件CS3020和磁鋼組成測(cè)量電路。CD40106由六個(gè)施密特觸發(fā)器電路組成,每個(gè)電路均為在兩個(gè)輸入端具有施密特觸發(fā)的反相器。在本設(shè)計(jì)中只用到了它的一個(gè)電路。用于脈沖整形,可以調(diào)節(jié)脈寬展寬的程度。圖314為CD40106整形后的波形圖。其中硬件部件有MSP430單片機(jī)、固定式三端穩(wěn)壓器LM7805,LM781SPX111復(fù)位芯片SP708S、獨(dú)立式鍵盤、LED、光耦TLP5211,TLP521驅(qū)動(dòng)L29霍爾傳感器CS30施密特反相器CD4010反相器74HC14。 展望基于MSP430單片機(jī)的直流電機(jī)調(diào)速系統(tǒng)是現(xiàn)代社會(huì)在工業(yè)發(fā)展的一個(gè)重要階段,隨著對(duì)調(diào)速的要求不斷提高和產(chǎn)量的增長(zhǎng),越來(lái)越多的生產(chǎn)機(jī)械要求調(diào)速系統(tǒng)能夠更加完善。而MSP430單片機(jī)能夠利用自身運(yùn)算速度快、集成度高、外部設(shè)備豐富、超低功耗等優(yōu)點(diǎn),使調(diào)速系統(tǒng)更加簡(jiǎn)便、靈活,使得在設(shè)計(jì)系統(tǒng)時(shí)可以使用較少的外部器件,既降低了成本又提高了系統(tǒng)的性能。論文從選題到完成的整個(gè)過程中,得到了張育軍老師的熱情幫助和精心指導(dǎo)。在此,還要感謝大學(xué)所有電氣老師在我學(xué)習(xí)中給予的幫助和支持。 附錄AThe Introduction of AT89C51DescriptionThe AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications.Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, a five vector twolevel interrupt architecture, a full duplex serial port, onchip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC:Supply voltage.GND:Ground.Port 0Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.Port 1Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal 1 also receives the loworder address bytes during Flash programming and verification.Port 2Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8bit addresses, Port 2 emits the contents of the P2 Special Function 2 also receives the highorder address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8bit bidirectional I/O port with internal Port 3 output buffers can sink/source four TTL 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the 3 also serves the functions of various special features of the AT89C51 as listed below:Table 1 The second function of P3 portPort PinAlternate FunctionsRXD (serial input port)TXD (serial output port) (external interrupt 0) (external interrupt 1)T0 (timer 0 external input)T1 (timer 1 external input) (external data memory write strobe)(external data memory read strobe)Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external pr
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