【正文】 方案設(shè)計、系統(tǒng)硬件方案設(shè)計、芯片選擇、編譯仿真平臺選擇、計時模塊的選擇、選擇控制等部分的設(shè)計與實現(xiàn)，對深入研究 EDA 技術(shù)和搶答器具有重大意義。 關(guān)鍵詞： EDA、 VHDL、搶答器 III Based on the design of EDA intelligent vies to answer first Abstract: This topic design based on a EDA intelligent vies to answer first device，with VHDL hardware description language programming. This design choice to EMP570T100C3 chip as core chip, the LED lights direction module, code modules, lock to save module and digital display module. Design platform for Altera pany Quartus II software. This paper introduces the design process of the intelligent vies to answer first device , including the system software project design, system hardware design, chip, piled, choose simulation platform choice, the choice of the module, choose timer control part of the design and implementation, to the more EDA technology and vies to answer first instruments have great significance. The experimental results show that the design not only practical, take up less hardware resources, small volume, and reflect the speed, it is easy to operate, entertaining strong, suitable for dozens of people vies to answer first, improve the market petitiveness is high, it has a good application prospect. Key words： EDA、 VHDL、 Vies to answer first device IV 目 錄 摘要 .................................................................................................................................I 目 錄 ............................................................................................................................ III 1 引言 .......................................................................................................................... 1 課題的開發(fā)背景和意義 .......................................................................................... 1 搶答器的現(xiàn)狀 .......................................................................................................... 1 課題任務(wù) .................................................................................................................. 2 2 EDA 開發(fā)技術(shù)概述 ................................................................................................ 3 EDA 技術(shù)的概念 .................................................................................................... 3 EDA 技術(shù)的發(fā)展史 ................................................................................................ 3 VHDL 語言的特點 .................................................................................................. 4 Quartus II 簡介 .................................................................................................. 4 CPLD 簡介 .............................................................................................................. 5 CPLD 可編程邏輯器件的發(fā)展歷程 ................................................................... 5 CPLD 的特點 ....................................................................................................... 6 CPLD 的使用 ....................................................................................................... 6 3 系統(tǒng)分析與總體方案設(shè)計 ...................................................................................... 8 智能搶答器的整體設(shè)計 .......................................................................................... 8 智能搶答器的硬件框圖 .......................................................................................... 8 實現(xiàn)方案分析與比較 .............................................................................................. 9 硬件方案設(shè)計 ....................................................................................................... 10 設(shè)計平臺與仿真工具選擇 ................................................................................ 10 自頂向下的設(shè)計方法 ........................................................................................ 11 芯片 EPM570T100C3 簡介 ............................................................................ 12 芯片 74HC04N 介紹 ......................................................................................... 12 芯片 CD4060 介紹 ............................................................................................ 12 搶答器外圍電路設(shè)計 ........................................................................................... 13 電源部分 ............................................................................................................ 13 晶振部分 ............................................................................................................ 13 管腳設(shè)置 ............................................................................................................. 14 4 搶答器功能實現(xiàn)與仿真 ........................................................................................ 15 頂層模塊圖 ........................................................................................................... 15 模塊詳細設(shè)計 ....................................................................................................... 15 編碼模塊 ............................................................................................................ 15 鎖存模塊 ............................................................................................................ 17 揚聲器提示模塊 ................................................................................................ 18 數(shù)碼顯示模塊 .................................................................................................... 19 頂層模塊設(shè)計 ..................................................................................................... 20 5 結(jié)論 ........................................................................................................................ 21 參 考 文 獻 ................................................................................................................ 22 致 謝 ............................................................................................................