外文翻譯---基于dds參數(shù)可調(diào)諧波信號發(fā)生器的研究-文庫吧資料
2025-06-10 22:31本頁面
【正文】 s that the power system supplies power to the electrical equipment with nonlinear characteristic. These nonlinear loads feed higher harmonic back to the power supply, and make the waveform of current and voltage in power system produce serious distortion. In the detection field of power system, standard signal generators which can simulate the power harmonic are highly needed to calibrate the power detecting equipment, such as phase detector, PD detector, and so on. So the research of parameter adjustable harmonic signal generator provides the exact basis for the stable operation of power detecting equipment, and has great economic benefit and social value. 2. Principle of direct digital synthesis Direct digital synthesis (DDS) is a new frequency synthesis technology which directly synthesizes waveform on the basis of phase. Using the relationship between phase and amplitude, the phase of waveform is segmented and assigned relevant addresses. In each clock period, these addresses are extracted and the relevant amplitudes are sampled. The envelope of these sampled amplitudes is the expected waveform. If the clock frequency is constant, the frequency of output signal is adjustable with different extracted steps of addresses. DDS is posed of phase accumulator, ROM table, DAC and LPF. In each clock period, the output of phase accumulator is accumulated with frequency control word, and high Lbit of the output are used as address to query the ROM table. In the ROM, these addresses are converted to the sampled amplitudes of the expected waveform. Then DAC converts the sampled amplitudes to ladder wave. In the LPF, the ladder wave is smoothed, and the output is the continuous analog waveform. Suppose that the clock frequency is fc, frequency control word is K, phase accumulator is Nbit, then output frequency is fout=(K/2N)fc, frequency resolution is Δfmin=fc/2N. According to the Nyquist Sample Criterion, output frequency upper limit is fmax. Because of the nonideal characteristic of LPF, output frequency upper limit of DDS is fmax=. 3. Scheme design . Design requirements The goal of the system is to design a harmonic signal generator, whose frequency, phase and harmonic proportion are adjustable. The output waveform is posed of fundamental wave, 3th harmonic, 5th harmonic and 7th harmonic. Frequency resolution is 1Hz. The adjustable range of initial phase is 0~2π and its resolution is 1o. The adjustable range of harmonic proportion is 0~50% and its resolution is 1%. According to the design requirements, system clock frequency is 15MHz and phase accumulator is 24bit. In order to make the most of EAB, 2118 bits ROM table is adopted. 11bit phase control word is used to meet the requirement of initial phase resolution. 7bit proportion control word is adopted to realize the setting of harmonic proportion. . Algori
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