【正文】 n pr o gr a m a nd d a ta me mo r y a s i n the P r i nc e to n a r c hi te ctur e. In ge ne ral ter ms a si ngle c hip mi cro co mp ute r is c hara c teri zed b y the i nco rp ora ti o n o f all the uni ts o f a c o mp ute r i nto a si ngl e d e v i c e. Keyword: Singlechip Microputer ROM RAM Programming Algorithm Features ? Compatible with MCS51? Products ? 4K Bytes of InSystem Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles ? Fully Static Operation: 0 Hz to 24 MHz ? Threelevel Program Memory Lock ? 128 x 8bit Internal RAM ? 32 Programmable I/O Lines ? Two 16bit Timer/Counters ? Six Interrupt Sources ? Programmable Serial Channel ? Lowpower Idle and Powerdown Modes Description The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s highdensity nonvolatile memory technology and ispatible with the industrystandard MCS51 instruction set and pinout. The onchipFlash allows the program memory to be reprogrammed insystem or by a conventionalnonvolatile memory programmer. By bining a versatile 8bit CPU with Flashon a monolithic chip, the Atmel AT89C51 is a powerful microputer which providesa highlyflexible and costeffective solution to many embedded control AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bittimer/counters, a five vector twolevel interrupt architecture,a full duplex serial port, onchip oscillator and clock addition, the AT89C51 is designed with static logicfor operation down to zero frequency and supports twosoftware selectable power saving modes. The Idle Modestops the CPU while allowing the RAM, timer/counters,serial port and interrupt system to continue functioning. ThePowerdown Mode saves the RAM contents but freezesthe oscillator disabling all other chip functions until the nexthardware reset. Pin Configurations Block Diagram Pin Description VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8bit opendrain bidirectional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as highimpedanceinputs. Port 0 may also be configured to be the multiplexed loworderaddress/data bus during accesses to external programand data memory. In this mode P0 has internalpullups. Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during program verification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal 1 also receives the loworder address bytes during Flash programming and verification. Port 2 Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function 2 also receives the highorder address bits and some control signals during