【正文】 P0 mouth is a twoway bus, send the introduction of 8 low addresses and data / export in timesharing Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 onechip puters as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drainsource resistance is it urge to open a way, do not need to have the resistance of drawing outcry . Mouths are all accurate twoway mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 onechip puter, port can only offer milliamp ere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an onechip puter. Its main function is to turn PC into 0000H initially , make the onechip puter begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there aren39。上海 :上海科學(xué)技術(shù)出版社， 1988 [7]:科學(xué)文獻(xiàn)出版社， 1987 [8]陳粵初等 .單片機(jī)應(yīng)用系統(tǒng)設(shè)計(jì)與實(shí)踐 .北京：北京航空航天大學(xué)出版社， 1991 [9]何立民 .MCS51 單片機(jī)應(yīng)用系統(tǒng)設(shè)計(jì) .北京：北京航空航天大學(xué)出版社， 1990 [10]李華 .MCS51 系列單片機(jī)實(shí)用接口技術(shù) .北京： 北京航空航天大學(xué)出版社， 1993 [11]何立民主編 .單片機(jī)應(yīng)用系統(tǒng)的功率接口技術(shù) .北京：北京航空航天大學(xué)出版社， 1993 [12]戴仙金 .51單片機(jī)及其 C 語(yǔ)言程序開(kāi)發(fā)實(shí)例 .北京 :清華大學(xué)出社 ,2021. [13]李廣弟，朱月秀等 .單片機(jī)基礎(chǔ) [M].北京：航空航天出版社，2021. [14].北京 :清華大學(xué)出版社 ,2021. [15]王建校 ,楊建國(guó) ,寧改娣 . 51 系列單片機(jī)及 C51 程序設(shè)計(jì)[M]．北京：科學(xué)出版社 ， [16]謝宜仁 .單片機(jī)實(shí)用技術(shù)問(wèn)答 .北京 :人民郵電出版社 [17]丁志剛 .單片微型計(jì)算機(jī)原理與應(yīng)用 . [M] .北京 :人民郵電出版社 [18]劉寶成，裴志利，族大學(xué)學(xué)報(bào) [19]INTEGRATED CIRCUITS DATA HANDBOOK 80C51based 8bit microcontrollers PHILIPS,1992 [20]Adel , Kenh :Microelectronics Circuits,3rd Edition, Holt Rinehart and Winston,Inc.,1991 附錄： 外文資料與 中文翻譯 外文資料： Structure and function of the MCS51 series Structure and function of the MCS51 series onechip puter MCS51 is a name of a piece of onechip puter series which Intel Company produces. This pany introduced 8 topgrade onechip puters of MCS51 series in 1980 after introducing 8 onechip puters of MCS48 series in 1976. It belong to a lot of kinds this line of onechip puter the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic position, basic performance and instruction system are all the same. 8051 daily representatives 51 serial onechip puters . An onechip puter system is made up of several following parts: 1 One microprocessor of 8 CPU . 2 At slice data memory RAM 128B/256B ,it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. 3 Procedure memory ROM/EPROM 4KB/8KB , is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some onechip puters, such as 8031 , 8032, 80C ,etc.. 4 Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. 5 Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the puter. 6 Five cut off cutting off the control system of the source . 7 One all depleting serial I/O mouth of UART universal asynchronous receiver/transmitter UART , is it realize onechip puter or onechip puter and serial munication of puter to use for. 8 Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahits now at most. Every the abovementioned part was joined through the inside data bus .Among them, CPU is a core of the onechip puter, it is the control of the puter and mand centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporalities of 8, storing device 2 temporarily, 839。 參考文獻(xiàn) [1]余發(fā)山，王福忠 .單片機(jī)原理及應(yīng)用技術(shù) [M].徐州：中國(guó)礦業(yè)大學(xué)出版社， [2]楊寧，胡學(xué)軍 .單片機(jī)與控制技術(shù) [M].北京：北京航空航天大學(xué)出版社， 2021 [3]王幸之 ,鐘愛(ài)琴 ,王雷 ,王閃 .AT89系列單片機(jī)原理與 接口技術(shù)[M]. 北京：北京航空航天大學(xué)出版社 ,2021 [4]：高等教育出版社， 2021 [5]張毅剛 .MCS51 單片機(jī)應(yīng)用設(shè)計(jì) .哈爾濱：哈爾濱工業(yè)大學(xué)出版社， 1990 [6]徐君毅等。 最后，我還要向所有曾經(jīng)幫助過(guò)我的同學(xué)和朋友們致敬。 本論文從選題到最后定稿成文， **老師一直給予了悉心指導(dǎo)，王老師那種嚴(yán)謹(jǐn)求實(shí)的作風(fēng)，廣博深邃的洞察力，孜孜不倦的開(kāi)拓精神和敬業(yè)精神令我深受啟 迪和教益，謹(jǐn)向我的指導(dǎo)老師王莉老師致以深深的謝意。 //綠燈亮 LED_G 0。 LED_R 0。baifenshu 。t 12。i++ //報(bào)警 LED_R ~LED_R。 //取百分比十分位 if ad_shuju Up_level //濃度很高，超過(guò)上限 for i 0。 //取百分比十位 baifenshu[2] tmp/10%10。 baifenshu[0] tmp/1000%10。 //讀 AD 數(shù)據(jù) tmp unsigned int ad_shuju *200/51。 delay 5 。t++ //掃描顯示 12 次，讀一次 AD display amp。 // while 1 for t 0。 // ADC_STR 0。 P3 0xff。 //計(jì)算百分比的臨時(shí)變量 P0 0x00。//保存顯示百 分比的數(shù)組 unsigned char data t,i。 //送顯示數(shù)據(jù) void main void unsigned char data ad_shuju。 //切換到要顯示的位 if i 2 P0 duan[ptr[i]] | 0x20。 else i 0。 0x27。 P0 0。 unsigned char code hang[4] 0x80,0x40,0x20,0x10 。 //關(guān)閉輸出使能 return shuju。 //打開(kāi)輸出使能 shuju ADC_DAT。 //延時(shí) while !ADC_EOC 。 // ADC_STR 0。 //鎖存地址 ADC_STR 1。 //i 從 0 加到 125， CPU 大概就耗時(shí) 1 毫秒 unsigned char ADC_convert void //對(duì)固定通道 7 進(jìn)行采集 unsigned char data shuju。 i 125。 /* void delay unsigned int a //延時(shí)函數(shù) 1MS/次 unsigned char data i。 define DPY P0 /*