【正文】 //發(fā)送數(shù)據(jù) } } }附件二：外文文章 Modulating Direct Digital Synthesizerin a QuickLogic FPGADan Morelli, VP of EngineeringAccelent Systems Inc.In the pursuit of more plex phase continuous modulation techniques,the control of the output waveform bees increasingly more difficult with analog circuitry. In these designs, using a nonlinear digital design eliminates the need for circuit board adjustments over yield and temperature. A digital design that meets these goals is a Direct Digital Synthesizer DDS. A DDS system simply takes a constant reference clock input and divides it down a to a specified output frequency digitally quantized or sampled at the reference clock frequency. This form of frequency control makes DDS systems ideal for systems that require precise frequency sweeps such as radar chirps or fast frequency control of the frequency output derived from the digital input word,DDS systems can be used as a PLL allowing precise frequency changes phase continuously. As will be shown, DDS systems can also be designed to control the phase of the output carrier using a digital phase word input. With digital control over the carrier phase, a high spectral density phase modulated carrier can easily be generated.This article is intended to give the reader a basic understanding of a DDS design, and an understanding of the spurious output response. This article will also present a sample design running at 45MHz in a high speed field programmable gate array from QuickLogic.A basic DDS system consists of a numerically controlled oscillator (NCO) used to generate the output carrier wave, and a digital to analog converter (DAC) used to take the digital sinusoidal word from the NCO and generate a sampled analog carrier. Since the DAC output is sampled at the reference clock frequency, a wave form smoothing low pass filter is typically used to eliminate alias ponents. Figure 1 is a basic block diagram of a typical DDS system design.The generation of the output carrier from the reference samp。//控制字 jisuan()。//執(zhí)行計(jì)算 write_ad9850()。 K=(count1+count2+count3+count4+count5)*3579+70179*asd。 while(KEY_FM==0) { shu_ma_guan()。 while(1){ sum=(count1+count2+count3+count4+count5)*100。 P3=0xff。 IT1=1。 IT0=1。 RI=0。 TL1=0x0bc。 PCON=0x00。 TMOD=0x20。TR0=1。TH0=1000/256。 } /*定時查鍵*********************************** void timer0(void)interrupt 1 using 1{TR0=0。//asd是二進(jìn)制值，電壓V= asd/51。}/*接受第一快單片機(jī)發(fā)來的數(shù)據(jù)*************/void jie_shou(void) { while(RI==0)。m++)。for(m=0。j++)。 for(j=0。j++)。 for(j=0。i++) { P1=con_word[i]。//yan shi for(i=0。m1。 W_CLK=0。unsigned char m。//sum%0x100}/*發(fā)送數(shù)據(jù)*****************************/void write_ad9850(void){unsigned char i。 con_word[3]=K%0x10000/0x100。 con_word[1]=K/0x1000000。i++)。 for(i=0。SEL1=1。 P0=tab[sum/10000000]。i255。SEL2=1。//百萬位 SEL0=0。i++)。 for(i=0。SEL1=0。 P0=tab[sum%1000000/100000]。i255。SEL2=1。//萬位 SEL0=0。i++)。 for(i=0。SEL1=1。 P0=tab[sum%10000/1000]。i255。SEL2=0。//百位 SEL0=0。i++)。 for(i=0。SEL1=0。P0=tab[sum%100/10]。i255。SEL2=0。 //個位第一個數(shù)碼管以下依次類推 SEL0=0。sum=(count1+count2+count3+count4+count5)*100。 else { count5=count5+1。 // K=count*14316。 } } if(KEY4==0)//1M~10M { if(count4==100000) count4=0。 } } if(KEY3==0)//100k~1000K { if(count3==10000) count3=0。 } } if(KEY2==0)//10k~100K { if(count2==1000) count2=0。/*用來控制1~9的加數(shù)來對4個擋位執(zhí)行加法..p32的鍵，中斷0***********************************/void int0(void)interrupt 0 using 0//緩慢加100{ if(KEY1==0)//1k~10K { if(count1==100) count1=0。//存儲1KHZ調(diào)制信號的幅度sbit KEY_FM=P3^5。sbit we=P3^4。k=fo*，因?yàn)閒o=count*100所以k=count*2386sbit FQ_UD=P3^6。unsigned long K。unsigned long sum。unsigned long count4。unsigned long count2。//4個擋位公用一個鍵sbit P33=P3^3。//100K~1000Ksbit KEY4=P2^7。//1K~10Ksbit KEY2=P2^5。sbit SEL2=P2^2。 } }接收程序：include/*3個數(shù)碼管所需的3個位用來做38譯碼*/sbit SEL0=P2^0。 fa_song()。 dout=P0。 OE=1。//選擇IN3端口 while(1) { ad0809()。 TI=0。 TL1=0x0bc。 PCON=0x00。 TMOD=0x20。 TI=0。}void fa_song(void) { SBUF=dout。 _nop_()。 _nop_()。 _nop_()。unsigned char dout。sbit OE=P2^4。sbit A2=P2^2。sbit A0=P2^0。設(shè)計(jì)過程中，進(jìn)一步溫習(xí)、鞏固了電子專業(yè)的各方面的知識，積累了一定的設(shè)計(jì)經(jīng)驗(yàn)，這對我以后從事硬件設(shè)計(jì)工作將有極大的幫助。本文設(shè)計(jì)的正弦波調(diào)制信號發(fā)生器經(jīng)過時序仿真，過程中有個別問題未曾得到解決，但設(shè)計(jì)基本達(dá)到了設(shè)計(jì)所要求的性能指標(biāo)。在這次設(shè)計(jì)中，細(xì)致深入的了解了DDS這個當(dāng)前電子領(lǐng)域的關(guān)鍵的數(shù)字化技術(shù)，再次詳細(xì)的了解了單片機(jī)方面的知識，在此基礎(chǔ)之上，進(jìn)行了整個正