【正文】 10 pF for Crystals= 40 pF 177。 20%。C, VCC = 177。 10 pF for Ceramic ResonatorsFigure 2. External Clock Drive ConfigurationRestrictions on Certain InstructionsThe AT89C2051 and is an economical and costeffectivemember of Atmel’s growing family of microcontrollers. Itcontains 2K bytes of flash program memory. It is fully patiblewith the MCS51 architecture, and can beprogrammed using the MCS51 instruction set. However,there are a few considerations one must keep in mindwhen utilizing certain instructions to program this device.All the instructions related to jumping or branching shouldbe restricted such that the destination address falls withinthe physical program memory space of the device, which is2K for the AT89C2051. This should be the responsibility ofthe software programmer. For example, LJMP 7E0Hwould be a valid instruction for the AT89C2051 (with 2K ofmemory), whereas LJMP 900H would not.1. Branching instructions:LCALL, LJMP, ACALL, AJMP, SJMP, JMP A+DPTRThese unconditional branching instructions will executecorrectly as long as the programmer keeps in mind that thedestination branching address must fall within the physicalboundaries of the program memory size (locations 00H to7FFH for the 89C2051). Violating the physical space limitsmay cause unknown program behavior.CJNE [...], DJNZ [...], JB, JNB, JC, JNC, JBC, JZ, JNZ Withthese conditional branching instructions the same ruleabove applies. Again, violating the memory boundariesmay cause erratic execution.For applications involving interrupts the normal interruptservice routine address locations of the 80C51 family architecturehave been preserved.2. MOVXrelated instructions, Data Memory:The AT89C2051 contains 128 bytes of internal data memory.Thus, in the AT89C2051 the stack depth is limited to128 bytes, the amount of available RAM. External DATAmemory access is not supported in this device, nor is externalPROGRAM memory execution. Therefore, no MOVX[...] instructions should be included in the program.A typical 80C51 assembler will still assemble instructions,even if they are written in violation of the restrictions mentionedabove. It is the responsibility of the controller user toknow the physical features and limitations of the devicebeing used and adjust the ins t ructions usedcorrespondingly.Programming The FlashThe AT89C2051 is shipped with the 2K bytes of onchipPEROM code memory array in the erased state (., contents= FFH) and ready to be programmed. The codememory array is programmed one byte at a time. Once thearray is programmed, to reprogram any nonblank byte,the entire memory array needs to be erased electrically.Flash Programming ModesNotes: 1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse atXTAL 1 pin.2. Chip Erase requires a 10 ms PROG pulse.3. is pulled Low during programming to indicate RDY/BSY.Internal Address Counter: The AT89C2051 contains aninternal PEROM address counter which is always reset to000H on the rising edge of RST and is advanced by applyinga positive going pulse to pin XTAL1.Programming Algorithm: To program the AT89C2051,the following sequence is remended.1. Powerup sequence:Apply power between VCC and GND pinsSet RST and XTAL1 to GND2. Set pin RST to “H”Set pin to “H”3. Apply the appropriate bination of “H” or “L” logiclevels to pins , , , to select one of theprogramming operations shown in the PEROM ProgrammingModes table.To Program and Verify the Array:4. Apply data for Code byte at location 000H to to.5. Raise RST to 12V to enable programming.6. Pulse once to program a byte in the PEROM arrayor the lock bits. The bytewrite cycle is selftimed andtypically takes ms.7. To verify the programmed data, lower RST from 12V tologic “H” level and set pins to to the appropiatelevels. Output data can be read at the port P1 pins.8. To program a byte at the next address location, pulseXTAL1 pin once to advance the internal addresscounter. Apply new data to the port P1 pins.9. Repeat steps 5 through 8, changing data and advancingthe address counter for the entire 2K bytes array or untilthe end of the object file is reached. sequence:set XTAL1 to “L”set RST to “L”Turn VCC power offChip Erase: The entire PEROM array (2K bytes) and thetwo Lock Bits are erased electrically by using the properbination of control signals and by holding low for10 ms. The code array is written with all “1”s in the ChipErase operation and must be executed before any nonblankmemory byte can be reprogrammed.Reading the Signature Bytes: The signature bytes areread by the same procedure as a normal verification oflocations 000H, 001H, and 002H, except that and must be pulled to a logic low. The values returned areas follows.(000H) = 1EH indicates manufactured by Atmel(001H) = 21H indicates 89C2051Programming InterfaceEvery code byte in the Flash array can be written and theentire array can be erased by using the appropriate binationof control signals. The write operation cycle is selftimedand once initiated, will automatically time itself topletion.All major programming vendors offer worldwide support forthe Atmel microcontroller series. Please contact your localprogramming vendor for the appropriate software revision.Flash Programming and Verification CharacteristicsTA = 0176。附錄C 系統(tǒng)原理圖附錄 D PCB圖附錄 E 英文資料1. AT89C20518bit Microcontroller with 2K Bytes Flash AT89C2051Features? Compatible with MCS51? Products? 2K Bytes of Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles? to 6V Operating Range? Fully Static Operation: 0 Hz to 24 MHz? Twolevel Program Memory Lock? 128 x 8bit Internal RAM? 15 Programmable I/O Lines? Two 16bit Timer/Counters? Six Interrupt Sour