【正文】 L. Xiujun and Meijer, “A systemlevel approach for thedesign of smart sensor interfaces.” Proceedings of IEEE Sensors,vol. 1, pp. 210–214, 2020.4. L. Xiujun。 on the contrary, the ConditionalBlock provides a scaleddown version of this differentialrange, so to give a reduced range of the control signal.The output voltage value Delta1V is obtained by the followingequation:Delta1V =Delta1Tk1+ k2(22)being Delta1T the differential temperature value and k1and k2twoconstants that can be defined by the user, so to arrange thevoltage range. For example, if we would to achieve a voltageoutput range between V to V, being the max admissible temperature value equal to 400?C, we could choose fork1and k2the following values: k1 = 200 and k2 = 。 10?3[?C?1] (20)From Rsensdetermination, we can derive the temperaturevalue by the following equation:Delta1T (?C) =Rsens? R0sensαPtFig. 16 On chip measures for the heater at two different temperaturesFrequency processing Temperature Processing13bit13bit13bitTemporal window logicDigital Counter13bitEnControlFig. 17 f/T converterRsensestimateTemperature estimateFrequency valueTo Differential Block13 bit13 bit 13 bitFig. 18 Temperature processing blockSpringer300 Analog Integr Circ Sig Process (2020) 47:293–301The RSENSestimate block putes the Rsensvalue by thefollowing equation:Rsens= 10? f? k( f ) (18)being k(f) a correction factor that has been taken equal to20 Omega1, but it can depend on frequency. Rsenscan be writtenas:Rsens= R0sens(1 + α s, we will have a rise in temperature testing range and so less sensibility. Figure 17 shows the digitalfrequencytoTemperature (f/T) conversion block scheme.The Frequency processing block putes, by the information provided from Digital Counter and Temporal windowlogic, the frequency value. Moreover, the Temporal windowlogic manages the temporisation of the digital counter. Thedigital counter dimension is the same (13 bits), so we cancount 8192 different configurations. The frequency value isdefined by the ratio between the output data of the digitalcounter and the temporal window dimension.Temperature value is obtained after two steps: Rsensvalueputation and its conversion into temperature, as shownin Fig. 18.Fig. 14 Power level vs. Rheater(at different reference currents Ibias)Fig. 15 HEATER circuit chip photo (yellow circled)1015202530354050 60 70 80 90 100 110 120 130 140 150Rheater (?)Power (mW)about 20176。A[17]. Vbiaslevel, which ensures 25 mWpower on heater resistance, is about V. Small variationsof this value do not affect the amount of power dissipatedon the heater resistance. Power measurements for the heater(whose chip photo is shown in Fig. 15) agree excellentlywith postlayout simulations, as shown in Figure figure, the power delivered by the heater is reported vs. different Rheatervalues at two specified temperatures (about 20?and 50?Celsius).5. Digital logic control architectureIn the system design specifications, we consider a temperature resolution of ?C, to which a KHz frequencyvariation corresponds. This imposes a time acquisition window larger then 300 181。 ID10sat(17)Transistor M5 acts as a current buffer for transistors M9and M10 to isolate them from the supply voltage, while Vbiaslevel, applied to the gate of M5, sets the required poweron Rheater. The drain currents of M9 and M10 are summedand mirrored through cascoded current mirror M1–M4. Thecurrent which flows into Rheateris equal to Id10, opportunelymirrored by M13–M16. By paring A and B node voltages,M17 drives the current into M19 and M20 which act directlyon the translinear loop.Typical Rheaterand Rparevalues are about 100 Omega1,whilethe power, which gives the required heating level to theconsidered chemioresistive gas sensor, is about 25 mW.Fig. 13 shows the power furnished by the heater circuitFig. 11 Layout level of the two solutions: a) first topology。 1% 87 s s %SpringerAnalog Integr Circ Sig Process (2020) 47:293–301 297Fig. 5 (a) Solution with inverting amplifier and buffers。 1% 14, 24 s s ? %10 GOmega1 10GOmega1 177。s and typical offset value of 150 181。W)applications.The proposed amplifier, having a 83 dB open loop gainanda55MHzGBW (see Fig. 9), has shown good performance concerning stability in temperature between 10 and80?C and power supply variations between the 177。m). Theyare all based on the CMOS OTA structure presented in asimplified version shown in Fig. 8. The circuit has beendesigned for low voltage ( 177。 C 100(14)Springer296 Analog Integr Circ Sig Process (2020) 47:293–301and finally we have:er%=VOFFV0+ VOFF 100 (15)From expression (15) we can conclude that the percentrelative error is very low if the output voltage V0is muchhigher than the offset voltage VOFF.The presented solution has been modified in two different ways: firstly (see Fig. 5(a)), by substituting the inverterswitch with an inverting attenuator。parenleftbigV0VOFF+V0parenrightbig4A Rsens Rsens C 2V0V0+ VOFF(12)By adding (11) and (12), we have:T = A Rsens C (V0+ VOFF)T+(10)from which we obtain:T+= A V0+1Rsens CintegraldisplayT+0(VOFF+ V0)dt(9)From Eq. (9) we have:A V0=+A t21V0(7)Fig. 4 Vinp voltage vs. timeso, paring (7) with (3), the