【導(dǎo)讀】主要有眼保姆，坐姿矯正器和各種護(hù)眼燈；國(guó)外有法國(guó)艾斯布魯斯研發(fā)的光明天使博士鏡，以及美國(guó)眼科專家威廉貝茨研發(fā)的阿瞳二代產(chǎn)品。但這些產(chǎn)品功能單一，不能滿足消費(fèi)者的。針對(duì)這一問題，提出將單片機(jī)與視力保護(hù)相結(jié)合，利用單片機(jī)芯片的智能處理。功能，結(jié)合超聲波測(cè)距原理，光敏電阻隨光強(qiáng)變化的特點(diǎn)，設(shè)計(jì)一個(gè)多功能視力保護(hù)器。值，產(chǎn)生聲光報(bào)警，確保學(xué)習(xí)時(shí)眼睛和書本保持一定的距離，從而保護(hù)視力。[摘要]隨著社會(huì)電子產(chǎn)品的日益增加，視力保護(hù)已成為人們共同關(guān)注的話題。為了達(dá)到人們對(duì)視。利用超聲波測(cè)距、光敏電阻感應(yīng)光線強(qiáng)度、STC89C52單片機(jī)進(jìn)行定時(shí)以及1602液晶顯示等技術(shù)，就視力保護(hù)器的理論與硬件的設(shè)計(jì)進(jìn)行了研究。

　　

【正文】 延時(shí)，有的長(zhǎng)，有的短，測(cè)距也有一定的誤差，但是影響都不大。 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 16 頁(yè)共 39 頁(yè) 結(jié)束語(yǔ) 本次畢業(yè)設(shè)計(jì)完成了一個(gè) 由 STC89C52 單片機(jī) 、超聲波及光敏電阻共同組合的一個(gè)多功能視力保護(hù)器 ，并用單片機(jī)匯編語(yǔ)言進(jìn)行軟件設(shè)計(jì)，經(jīng)過測(cè)試，基本滿足設(shè)計(jì)目標(biāo)，可以完成各項(xiàng)基本功能。 本文探索并實(shí)現(xiàn)了 多功能視力保護(hù)器 設(shè)計(jì)的完整過程。 該系統(tǒng)具有 很高 的使用價(jià)值 ，很好地達(dá)到了設(shè)計(jì)的目的 ， 發(fā)展了利用 單片機(jī) 設(shè)計(jì) 視力保護(hù)器 的思想， 增加了單片機(jī)在現(xiàn)實(shí)生活中的應(yīng)用。通過 超聲波原理 輔助學(xué)生坐直進(jìn)而 保護(hù)其 視力，簡(jiǎn)單方便且不會(huì)產(chǎn)生系統(tǒng)穩(wěn)定性方面的問題。 通過光敏電阻對(duì)光的特性，很好地提醒了學(xué)生不要在光線太強(qiáng)或者過弱下學(xué)習(xí)。 盡管這次的設(shè)計(jì)達(dá)到了畢設(shè)的要求，但覺得這些還是不夠人性化，因?yàn)闀r(shí)間關(guān)系只能做這么多，如果可以讓這個(gè)設(shè)計(jì)更加完善， 應(yīng)該讓其在工作的時(shí)候若在一定范圍內(nèi)感應(yīng)不到人的情況下自動(dòng)停止計(jì)時(shí)，當(dāng)再次感應(yīng)到人的時(shí)候能夠自動(dòng)開始計(jì)時(shí)。還有可以給其上面再加些功能，如溫度感 應(yīng)裝置，可以在溫度有點(diǎn)低的情況下提醒使用者添加衣服。 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 17 頁(yè)共 39 頁(yè) 參考文獻(xiàn) [1]陳煒 . 簡(jiǎn)易青少年視力保護(hù)器的設(shè)計(jì) [J].科技展望 ,2021,33:8789. [2]屏幕視力保護(hù)器 [J]. 工業(yè)設(shè)計(jì) ,2021,05:6063. [3]李濟(jì)安 . 會(huì)說話的文具盒 轟動(dòng)讀者節(jié) [J].現(xiàn)代營(yíng)銷 (經(jīng)營(yíng)版 ),2021,01:45. [4]徐國(guó)平 . 智能感控視力保護(hù)儀的設(shè)計(jì) [D].華中師范大學(xué) ,. [5]張玉鳳 ,李水蓮 . 基于 51 單片機(jī)的紅外視力保護(hù)儀的設(shè)計(jì) [J].電子制作 ,2021,08:712. [6]商瑩 . 視力保護(hù)儀的研究與設(shè)計(jì) [J].新技術(shù)新工藝 ,2021,06:3436. [7]何冰 ,王菊霞 ,蘇變玲 . 基于單片機(jī)的視力保護(hù)器設(shè)計(jì) [J].電子設(shè)計(jì)工程 ,2021,03:8992. [8]李驍 ,王彬媛 ,王振中 ,劉炳言 ,李昱釗 ,張黔 . 基于 STC89C52 單片機(jī)的視力保護(hù)器設(shè)計(jì) [J]. 電子世界 ,2021,19:160162. [9]張標(biāo) . 視力保護(hù)器 [J]. 發(fā)明與創(chuàng)新 ,2021,09:2728. [10]盛占石 ,黃賽帥 ,王青青 . 基于 STC89C52 智能計(jì)數(shù)控制儀 [J]. 儀表技術(shù)與傳感器 ,2021,01:5759. [11]刁宇清 . 基于 PROTEUS的單片機(jī)仿真實(shí)驗(yàn)系統(tǒng)研究及應(yīng)用 [D].西安工業(yè)大學(xué) ,2021,05:2428. [12]趙健 .實(shí)用聲光電及無(wú)線電遙控電路 300 例 .[J]北京：中國(guó)電力出版社， . [13]姚遠(yuǎn) ,毛海莉 ,徐國(guó)平 ,吳炎波 . 基于單片機(jī)的超聲波測(cè)距系統(tǒng)設(shè)計(jì) [J]. 高等函授學(xué)報(bào) (自然 科學(xué)版 ),2021,04:6971. [14]王君 . 根據(jù)單片機(jī)的超聲測(cè)距系統(tǒng)原理設(shè)計(jì) [J]. 信息通信 ,2021,03:104105. [15]曾勇 . 基于 單片機(jī)的超聲波報(bào)警系統(tǒng)設(shè)計(jì) [J]. 科技視界 ,2021,09:112114. [16]Rong Pan,Hai Zhao,Jialiang Wang,Dan Liu,Penghua Cai. The Design and Implement of TCP/IP Protocol Cluster on AVR Singlechip[J]. Journal of Software Engineering and Applications,2021,38. 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 18 頁(yè)共 39 頁(yè) 附錄 A 英文文獻(xiàn) 原文 The Introduction of AT89C51 Description The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications. Function characteristic The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, one 5 vector twolevel interrupt architecture, a full duplex serial port, onechip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC： Supply voltage. GND： Ground. Port 0 Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs. Port 0 may also be configured to be the multiplexed address/data bus during accesses to external program and data memory. In this mode P0 has internal Pullup resistor. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during Program verification. External Pullup resistors are required during Program verification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal Pullup resistors. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal Pullup resistors and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal Pullup resistors. Port 1 also receives the loworder address bytes during Flash programming and verification. Port 2 Port 2 is an 8bit bidirectional I/O port with internal Pullup resistor. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal Pullup resistor and can be used as inputs. As inputs, Port 2 pins that are externally 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 19 頁(yè)共 39 頁(yè) being pulled low will source current, because of the internal Pullup resistor. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses. In this application, it uses strong internal Pullup resistor when emitting 1s. During accesses to external data memory that use 8bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8bit bidirectional I/O port with internal Pullup resistor. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal Pullup resistor and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the Pullup resistor. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal oper