【正文】 { if(count4==100000) count4=0。 else { count4=count4+10000。 // K=count*14316。k=fo*，因為fo=count*100所以k=count*14316 } } }/*步進100HZ用中斷*************************************/void int1(void)interrupt 2 using 2//{ if(count5==100000) count5=0。 else { count5=count5+1。//步進100HZ } }/* 數(shù)碼管掃描 ************************************** */void shu_ma_guan(void){unsigned char i。sum=(count1+count2+count3+count4+count5)*100。 P0=tab[sum%10]。 //個位第一個數(shù)碼管以下依次類推 SEL0=0。SEL1=0。SEL2=0。 for(i=0。i255。i++)。P0=tab[sum%100/10]。//十位 SEL0=1。SEL1=0。SEL2=0。 for(i=0。i255。i++)。 P0=tab[sum%1000/100]。//百位 SEL0=0。SEL1=1。SEL2=0。 for(i=0。i255。i++)。 P0=tab[sum%10000/1000]。//千位 SEL0=1。SEL1=1。SEL2=0。 for(i=0。i255。i++)。 P0=tab[sum%100000/10000]。//萬位 SEL0=0。SEL1=0。SEL2=1。 for(i=0。i255。i++)。 P0=tab[sum%1000000/100000]。//十萬位 SEL0=1。SEL1=0。SEL2=1。 for(i=0。i255。i++)。 P0=tab[sum%10000000/1000000]。//百萬位 SEL0=0。SEL1=1。SEL2=1。 for(i=0。i255。i++)。 P0=tab[sum/10000000]。//千萬位 SEL0=1。SEL1=1。SEL2=1。 for(i=0。i255。i++)。}/*計算*****************************************/void jisuan(void){ con_word[0]=0x01。 con_word[1]=K/0x1000000。//主高位先發(fā)送，然后接著往下發(fā) con_word[2]=K%0x1000000/0x10000。 con_word[3]=K%0x10000/0x100。 con_word[4]=K%0x100。//sum%0x100}/*發(fā)送數(shù)據(jù)*****************************/void write_ad9850(void){unsigned char i。unsigned char j。unsigned char m。 FQ_UD=0。 W_CLK=0。 for(m=0。m1。m++)。//yan shi for(i=0。i5。i++) { P1=con_word[i]。 W_CLK=0。 for(j=0。j1。j++)。 //yan shi W_CLK=1。 for(j=0。j1。j++)。//yan shi }FQ_UD=1。for(m=0。m1。m++)。//yan shi FQ_UD=0。}/*接受第一快單片機發(fā)來的數(shù)據(jù)*************/void jie_shou(void) { while(RI==0)。 asd=SBUF。//asd是二進制值，電壓V= asd/51。 RI=0。 } /*定時查鍵*********************************** void timer0(void)interrupt 1 using 1{TR0=0。shu_ma_guan()。TH0=1000/256。TL0=1000%256。TR0=1。}*/void main(void){ SCON=0x50。 TMOD=0x20。 TCON=0x40。 PCON=0x00。 TH1=0x0bc。 TL1=0x0bc。 TR1=1。 RI=0。 EX0=1。 IT0=1。 EX1=1。 IT1=1。 EA=1。 P3=0xff。 P1=0x00。 while(1){ sum=(count1+count2+count3+count4+count5)*100。 //用于數(shù)碼管顯示 shu_ma_guan()。 while(KEY_FM==0) { shu_ma_guan()。 jie_shou()。 K=(count1+count2+count3+count4+count5)*3579+70179*asd。//控制字，頻偏10KHZ jisuan()。//執(zhí)行計算 write_ad9850()。//發(fā)送數(shù)據(jù) } while (we==0) { K=(count1+count2+count3+count4+count5)*3579。//控制字 jisuan()。//執(zhí)行計算 write_ad9850()。//發(fā)送數(shù)據(jù) } } }附件二：外文文章 Modulating Direct Digital Synthesizerin a QuickLogic FPGADan Morelli, VP of EngineeringAccelent Systems Inc.In the pursuit of more plex phase continuous modulation techniques,the control of the output waveform bees increasingly more difficult with analog circuitry. In these designs, using a nonlinear digital design eliminates the need for circuit board adjustments over yield and temperature. A digital design that meets these goals is a Direct Digital Synthesizer DDS. A DDS system simply takes a constant reference clock input and divides it down a to a specified output frequency digitally quantized or sampled at the reference clock frequency. This form of frequency control makes DDS systems ideal for systems that require precise frequency sweeps such as radar chirps or fast frequency control of the frequency output derived from the digital input word,DDS systems can be used as a PLL allowing precise frequency changes phase continuously. As will be shown, DDS systems can also be designed to control the phase of the output carrier using a digital phase word input. With digital control over the carrier phase, a high spectral density phase modulated carrier can easily be generated.This article is intended to give the reader a basic understanding of a DDS design, and an understanding of the spurious output response. This article will also present a sample design running at 45MHz in a high speed field programmable gate array from QuickLogic.A basic DDS system consists of a numerically controlled oscillator (NCO) used to generate the output carrier wave, and a digital to analog converter (DAC) used to take the digital sinusoidal word from the NCO and generate a sampled analog carrier. Since the DAC output is sampled at the reference clock frequency, a wave form smoothing low pass filter is typically used to eliminate alias ponents. Figure 1 is a basic block diagram of a typical DDS system design.The generation of the output carrier from the reference samp