【正文】 one heck of a little invention. Today39。s 64bit microprocessors are still based on similar designs, and the microprocessor is still the most plex massproduced product ever with more than million transistors performing hundreds of millions of calculations each second numbers that are sure to be outdated fast.The single chip structureThe NVIDIA nForce media and munications processors (MCPs) deliver advanced technologies and unmatched performance to desktop, mobile, and professional systems, and continue the NVIDIA tradition of industryleading platform technology.185。Coupled with the NVIDIA Unified Driver Architecture (UDA), which ensures a stable software image for simplified deployment and upgrades in the enterprise, the featurerich NVIDIA MCP platforms deliver value without promising performance, and enable a new generation of highly efficient and scalable systems: Lowered latencies:The singlechip NVIDIA architecture provides an inherent performance advantage pared to dualchip implementations of the same functionality. In addition to overall latency reductions, the NVIDIA nForce MCP significantly boosts device throughput. An extremely fast dedicated HyperTransport link lets the NVIDIA MCPs municate with the CPU at up to , which ensures ample system bandwidth. This is especially beneficial when multiple devices are active, or for supporting highbandwidth devices. Design efficiency:The NVIDIA singlechip architecture uses micron process technology pared with the micron process used by existing solutions on the market today. This solution offers unmatched integration of features and functionality and results in: Simplified board layouts and more room for onboard features and addon chipsets. Lower power consumption and dissipated heat. Simplified inventory management and cost efficiencies. Advanced technology features:Builtin NVIDIA RAID technology delivers optimized disk performance through disk striping and fault tolerance through disk mirroring. Select versions of the NVIDIA nForce MCPs incorporate a native Gigabit Ethernet port TCP/IP acceleration. NVIDIA delivers the highest performance networking solution for desktops and workstations. In addition, NVIDIA nForce solutions offer support for the latest graphics processors.The NVIDIA nForce MCPs uphold NVIDIA’s traditions of reliability, stability, and patibility. Adherence to the Company’s standards for engineering excellence continues to ensure the success of a growing base of design partners building systems and solutions with AMD and NVIDIA technology.AVR single chipThe best example is AVR single core bines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega8 provides the following features: 8K bytes of InSystem Programmable Flash with ReadWhileWrite capabilities, 512 bytes of EEPROM, 1K byte of SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with pare modes, internal and external interrupts, a serial program mable USART, a byte oriented Twowire Serial Interface, a 6channel ADC (eight channels in TQFP and MLF packages) where four (six) channels have 10bit accuracy and two channels have 8bit accuracy, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Powerdown mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next Interrupt or Hard ware Reset. In Powersave mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crys tal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast startup bined with lowpower consumption. The device is manufactured using Atmel’s high density nonvolatile memory technology. The Flash Program memory can be reprogrammed InSystem through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an Onchip boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash Memory. Software in the Boot Flash Section will continue to run while the Application Flash Section is updated, providing true ReadWhileWrite operation. By bining an 8bit RISC CPU with InSystem Self Programmable Flash on a monolithic chip, the Atmel ATmega8 is a powerful microcontroller that provides a highlyflexible and costeffective solution to many embedded .Control applications The ATmega8 AVR is supported with a full suite of program and system development tools, including C pilers, macro assemblers, program debugger/simulators, InCir cuit Emulators, and evaluation kits.Due to cost that is sensitive to microcontroller, so, at present, the dominant software or lowest assembly language, besides the binary machine，code is above the lowest language. Many senior language has reached the level of visual programming . That is the results why the cost is reason is very simple, that is no home puter microcontroller as the CPU, also did not like hard disk that mass storage device. A visual small programs written in highlevel languages inside has even a button, also can achieve dozens of K size! For household PC hard disk speaking nothing, but the SCM speakin