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= (1 ? D)CA=1 ? D1 ? aD(47)= 1 ? (1 ? a) D[1 + (aD) + (aD)2 + (aD)3 + ]The maximum error occurs during the ?rst delay interval when F {0+} = 1. After n delay steps F {n+}is reduced to a n . Even though this result is optimum with respect to the minimum largest absolute errorcriterion, the recovery from a load upset can be very slow when a is close to 1 (or divergent, when a isgreater than 1). The ratio of the IAE to the optimum is 1/(1?a). Consequently modelfeedback controlmay not adequately reject an unmeasured load disturbance, when the process has a dominant lag (anear 1), unless wellchosen innerloop feedback is applied or the model deliberately mismatches theprocess, as remended in [6]. However, design of the innerloop controller or the model mismatch,for near optimal load rejection, may require more detailed highfrequency knowledge (for example,a spectral factorization of process polynomials) than is necessary for selecting an output trajectory(openloop controller) to achieve good setpoint tracking.The stability of a tightly tuned matchedmodel feedback loop is very sensitive to mismatch betweenthe model and process delays. To achieve adequate robustness, it may be necessary to detune thecontroller with H , further sacri?cing unmeasuredload rejection capability.Without the inner loop or deliberate model mismatch, early return of the output from saturationmay cause excessively slow controlledvariable response of a dominantlag process to a large setpointstep. As with openloop control, an online nonlinear optimizer may be used to avoid this suboptimalbehavior.Algebraic Proportional plus Integral plus Derivative DesignIn this section a twophase method for applying Eq. (10) to the design of analog (or fastsamplingdigital) proportional plus integral plus derivative (PID) controllers is described. Unlike Bode and rootlocus design methods, this method allows all of the controller parameters as well as the closedloopperformance parameters (time scale and load sensitivity) to be found directly, without trial and error.The process is represented with an A polynomial in s . B, D, and C are assumed 1. The inverseof a delay or small numerator zero factor (if representable as a convergent Taylor series up to thefrequency range critical for stability) is included in the A polynomial,(a0 + a1s + a2s 2 + a3s 3 + ) y = u + e(48)A large stable zero is unusual and requires special consideration. It should be approximately canceledby a controller or process pole. Such a pole is not available from a PID controller. However, an effectiveprocess cancellation, without a factorization, may result by disregarding the zeroorder terms of bothCONTROL SYSTEM FUNDAMENTALSthe process numerator and the denominator before determining A by polynomial division. When theprocess zero and pole are suf?ciently dominant, mismatch in zeroorder terms, which affects the verylowfrequency behavior, will be corrected by high controller gain in that frequency range.This twophase design process implicitly imposes the performance limitation that would normallybe imposed by including delay and nonminimumphase zeros in D. The ?rst design phase preventsinnerloop feedback when the openloop process already approximates a pure delay. This is done byselecting the innerloop gain and derivative terms,G I = K M + D M s(49)to make the closed inner loopHI?1approximate a delay at low and moderate frequencies. As manyloworder terms of Eq. (10) are matched as are needed to determine the unknown controller andperformance parameters.The HI polynomial is chosen to be the Taylorseries expansion of an inverse delay whose time τ Iand gain h 0 is to be determined,HI = h 0 1 + τ I s +(τ I s )22+(τ I s )36+ (50)When FI is chosen as 1 (instead of choosing h 0 as 1), Eq. (10) givesHI = A + G I(51)The limitedplexity innerloop proportional plus derivative controller can signi?cantly in?uence only the loworder closedloop terms and hence can shape only the lowfrequency closedloopbehavior. Only the most dominant two poles (lowest in frequency) of the openloop process may beunstable, since only they can be stabilized with proportional and derivative feedback. As a result thelimiting closed innerloop performance measures, the values of τ I and h 0, are determined by a2 anda3, provided the latter have the same sign. Equating term by term and rearranging givesτ I =3a3a2h 0 =2a2τ I2(52)D M = h 0τ I ? a1K M = h 0 ? a0When the sign of D M is different from that of K M , or derivative action is not desired, the parametersshould be calculated withτ I =2a2a1h 0 =a1τ I(53)D M = 0K M = h 0 ? a0For a pure delay process both K M and D M are zero. The closed inner loop beesy =r I + eHI(54)PROCESS/INDUSTRIAL INSTRUMENTS AND CONTROLS HANDBOOKThe outer loop uses gain and integral terms applied to the error,r I =1I E s+ K E (r ? y)(55)Using this equation to eliminate r I from the previous gives[1 + I E s ( K E + HI )] y = (1 + K E I E s )r + I E se(56)The target closedloop setpoint behavior is chosen to approximate a nonovershooting delaylike model,n equal lags. The shape parameter n and the time constant τ0 are to be determined, as are the controllerparameters K E and I E ,1 +τ0snny = r +I E se1 + K E I E s(57)Equating term by term and solving the four simultaneous equations givesn = τ0 = IK E = 0(58)I E = τ0/ h 0A small value of I E is desirable because its product with the output change is equal to the integratederror response to a load change. Since the controller is designed to achieve very sma