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基于at89c51的遙控定時器外文翻譯-其他專業(yè)-資料下載頁

2025-01-19 08:41本頁面

【導讀】術生產(chǎn),并且能夠與MCS-51系列的單片機兼容。片內(nèi)含有8位中央處理器和閃爍存。儲單元,有較強的功能的AT89C51單片機能夠被應用到控制領域中。器,32個I/O口,2個16位定時/計數(shù)器,1個5向量兩級中斷結構,1個串行通信口,片內(nèi)震蕩器和時鐘電路。另外,AT89C51還可以進行0HZ的靜態(tài)邏輯操作,并支持。兩種軟件的節(jié)電模式。閑散方式停止中央處理器的工作,能夠允許隨機存取數(shù)據(jù)存儲。儲器中的內(nèi)容,但震蕩器停止工作并禁止其它所有部件的工作直到下一個復位。一個管腳都能夠驅動8個TTL電路。當“1”被寫入P0口時,每個管腳都能夠作為高??偩€復用,并在這時激活內(nèi)部的上拉電阻。程序校驗時,輸出指令,需要接電阻。部數(shù)據(jù)存儲器時,P2口線上的內(nèi)容在整個運行期間不變。以防止中斷誤復位,當器件復位,中斷引腳持續(xù)為低時,令的后一條指令不應該是一條對端口或外部存儲器的寫入指令。

  

【正文】 truction executed. The onchip RAM and Special Function Registers retain their values until the Powerdown mode is terminated. Exit from Powerdown mode can be initiated either by a hardware reset or by activation of an enabled external interrupt (INT0 or INT1). Reset redefines the SFRs but does not change the onchip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Mode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3 Idle Internal 1 1 Data Data Data Data Idle External 1 1 Float Data Address Data Powerdown Internal 0 0 Data Data Data Data Powerdown External 0 0 Float Data Data Data Table Status of External Pins During Idle and Powerdown Modes Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an onchip oscillator, as shown in Figure a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a dividebytwo flipflop, but minimum and maximum voltage high and low time specifications must be observed. 11 Figure 1. Oscillator Connections Figure 2. External Clock Drive Configuration Timer 8 counters but actually (address 0FH) by the timer control register (address 0EH, see also Table 25) to control, decides when the control register uses in establishing timer39。s frequency (4096,64,1, either 1/60Hz), as well as hypothesis timer effective or invalid. Ti mer 8 binary numbers which establishes from the software count but actually, each time but actually counted finishes, the timer established flag bit TF (to see also Table 7), timer flag bit TF only might use the software to eliminate, TF used in having an interrupt (/INT), each count cycle produced a pulse to take the signal of stop but actually. The TI/TP control break produces condition. When reads the timer, the returns current counts but actually value. The CLKOUT clock outputs Base pin CLKOUT may output the programmable squarewave. CLKOUT frequency register the decision squarewave frequency, CLKOUT may output (default value), 1024,32,1Hz squarewave. CLKOUT is opens leaks outputs the base pin, when the circular telegram effective, is invalid when is the high impedance. Method 1: the definite value OSCI electric capacity putation needs electric capacity mean value, with this value definite value electric capacity, after the circular telegram, determines the frequency characteristic on the CLKOUT base pin is , determines the frequency value deviation is decided by the quartz chip, between the electric capacity deviation and ponent39。s deviation (average for 177。5106). The average deviation may reach 5 minute/year Method 2: the OSCI trimming electric capacity may through adjust the OSCI base pin39。s trimming electric capacity to enable the oscillator frequency to achieve the precise value, by now was observable when the circular telegram on base pin CLKOUT signal Method 3: OSCI output direct measurement base pin OSCI output.
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