【導讀】與MCS-51單片機產(chǎn)品兼容。8K字節(jié)在系統(tǒng)可編程Flash存儲器。三級加密程序存儲器。32個可編程I/O口線。三個16位定時器/計數(shù)器。全雙工UART串行通道。掉電后中斷可喚醒。使用Atmel公司高密度非易失性存儲器技術(shù)制造，與工業(yè)80C51產(chǎn)品指令。和引腳完全兼容。片上Flash允許程序存儲器在系統(tǒng)可編程，亦適于常規(guī)編程器?？刂茟孟到y(tǒng)提供高靈活、超有效的解決方案。AT89S52具有以下標準功能：8k字。定時器/計數(shù)器，一個6向量2級中斷結(jié)構(gòu)，全雙工串行口，片內(nèi)晶振及時鐘電路。另外，AT89S52可降至0Hz靜態(tài)邏輯操作，支持2種軟件可選擇節(jié)電模式。下，CPU停止工作，允許RAM、定時器/計數(shù)器、串口、中斷繼續(xù)工作。P0口：P0口是一個8位漏極開路的雙向I/O口。作為輸出口，每位能驅(qū)動8個TTL. 對P0端口寫“1”時，引腳用作高阻抗輸入。狗計時完成后，RST腳輸出96個晶振周期的高電平。將地址為8EH的SFR的第0位置“1”，ALE操作將無效。在執(zhí)行MOVX或MOVC指令時有效。WDT由13位計數(shù)器和特殊功能寄存器中

　　

【正文】 ) Timer 2 can be programmed to count up or down when configured in its 16bit autoreload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD . Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin. Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16bit reload can be triggered either by an overflow or by a 1to0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 102. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. 20 The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt. 8. Baud Rate Generator Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the autoreload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the following equation. The Timer can be configured for either timer or counter operation. In most applications, it is configured for timer operation (CP/ T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below. where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16bit unsigned integer. This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1to0 T im e r 2 O v e r f l o w R a teM o d e s 1 a n d 3 B a u d R a te s = 16M o d e s 1 a n d 3 O s c il l a to r F r e q u e n c yB a u d R a te 3 2 [ 6 5 5 3 6 R C A P 2 H , R C A P 2 L ]? ?21 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers. 9. Programmable Clock Out A 50% duty cycle clock can be programmed to e out on . This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16MHz operating frequency). To configure the Timer/Counter 2 as a clock generator, bit C/ T2 () must be cleared and bit T2OE () must be set. Bit TR2 () starts and stops the timer. The clockout frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation. In the clockout mode, Timer 2 rollovers will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baudrate generator. It is possible to use Timer 2 as a baudrate generator and a clock generator simultaneously. Note, however, that the baudrate and clockout frequencies cannot be determined independently from one another since they both use RCAP2H and RCAP2L. 10. Interrupts The AT89S52 has a total of six interrupt vectors: two external interrupts ( INT0 and O s c il a to r F r e q u e n c yC l o c k O u t F r e q u e n c y = 4 [ 6 5 5 3 6 ( R C A P 2 H , R C A P 2 L ) ]?22 INT1 ), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that bit position is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in regist