【文章內(nèi)容簡介】 時(shí)隨地用各種設(shè)備上網(wǎng)。 4．精簡系統(tǒng)內(nèi)核、算法，降低功耗和軟硬件成本。 未來的嵌入式產(chǎn)品是軟硬件緊密結(jié)合的設(shè)備，為了減低功耗和成本，需要設(shè)計(jì)者盡量精簡系統(tǒng)內(nèi)核，只保留和系統(tǒng)功能緊密相關(guān)的軟硬件，利用最低的資源實(shí)現(xiàn)最適當(dāng)?shù)墓δ?，這就要求設(shè)計(jì)者選用最佳的編程模型和不斷改進(jìn)算法，優(yōu)化編譯器性能。因此，既要軟件人員有豐富的硬件知識(shí)，又需要發(fā)展先進(jìn)嵌入式軟件技術(shù)，如 Java、 Web 和 WAP 等。 5．提供友好的多媒體人機(jī)界面 嵌入式設(shè)備能與用戶親密接觸，最重要的因素就是它能提供非常友好的用戶界面。圖像界面，靈活的控制方式，使得人們感覺嵌入式設(shè)備就象是一個(gè)熟悉的老朋友。這方面的要求使得嵌入式軟件設(shè)計(jì)者要在圖形界面，多媒體技術(shù)上痛下苦功。手寫文字輸入、語音撥號(hào)上網(wǎng)、收發(fā)電子郵件以及彩色圖形、圖像都會(huì)使使用者獲得自由的感受。目前一些先進(jìn)的 PDA 在顯示屏幕上已實(shí)現(xiàn)漢字寫入、短消息語音發(fā)布，但一般的嵌入式設(shè)備距離這個(gè)要求還有很長的路要走。 Based on the ARM7 embedded appliance control system design One， The ARM739。s Profile The ARM7 lead series processors are mainstream embedded processor designed by the British pany ARM ARM7 core is 。 ARM9based core is a 5stage pipeline, provide no MMU, the ARM720T is the MMU, ARM9 ARM9TDMI and ARM9ES Series ARM9 is the MMU ARM940T Memory protection unit is not a plete MMU. Basic information ARM9clock frequency is higher than the ARM7, a Harvard architecture distinguishes between the data bus and instruction bus, ARM7 processor with three pipeline, while the ARM9 five pipeline, five pipeline to deal with the allocation of each instruction to 5 clock cycles in each clock cycle at the same time, five instructions in execution. ARM9TDMI processor clock frequency of the ARM7TDMI from to times in the same process. Instruction cycle The improvement of instruction cycle: loads instructions spear n stores instructions The most obvious improvement of the instruction cycle number is loads of instructions and stores instructions. From ARM7 to ARM9 these two mands, the execution time reduced by 30%. The instruction cycle is due to two basic microprocessing structure within both the ARM7 and ARM9 processor. (1) ARM9based independent instruction and data memory interface, and allows the processor to fetch and read and write data. This is called a modified Harvard architecture. ARM7 only data memory interface, it is also used to fetch and data access. (2) 5stage pipeline to introduce a separate memory and written back to the assembly line, were used to access memory and write the results back to the register. Two more than one cycle to plete loads instructions and stores instructions. Interlocking (interlocks) technology When the instruction data because the previous instruction is not executed is not ready will have a pipeline interlock since the lock. When the pipeline interlock occurs, the hardware will stop the execution of this instruction until the data is ready. Although this technique will increase the code execution time, but provides great convenience for the early designers. Compiler and assembly language programmers can redesign of the code sequence or other methods to reduce the number of pipeline interlock. Branch instruction ARM9 and ARM7branching instruction cycle is the same. ARM9TDMI and ARM9ES does not branch instruction to predict. The ARM9 structure and characteristics Introduced ARM9ES as an example the main structure and characteristics of the ARM9 processor. (1) 32bit fixedpoint RISC processor, improved the ARM / Thumb code intertwined, enhance sexual multiplier design, support realtime (realtime) debugging。 (2) onchip instruction and data SRAM, and the instruction and data memory capacity is adjustable。 (3) onchip instruction and data caches (cache) capacity from 4K bytes to 1M bytes。 (4) is set protection unit (protcction unit), and is ideal for embedded applications, memory segmentation and protection。 (5) using the AMBA AHB bus interfaces and peripherals to provide a unified address and data bus。 (6) support for external coprocessor instruction and data buses with a simple handshake signaling support。 (7) to support standardsbased scan test methodology, and support the BIST (builtinselftest)。 Support the Embedded Trace Macrocell (8), to support realtime tracking instructions and data。 Basic introduction to ARM offers a range of kernel, system extensions, microprocessors and systemonchip program. All products are a mon software system, so the same software can be run in all products (in theory). Typical products are as follows. ① the CPU core ARM7: Small, fast, lowpower, integrated RISC core for mobile munications. The ARM7TDMI (Thumb): This is the authorized user of a product, the ARM7 instruction set with Thumb extensions together to reduce the memory capacity and system cost. Also use the embedded ICE debug technology to simplify system design, and a DSPenhanced extensions to improve performance. The typical use of the product is a digital cellular phones and hard drives. ARM9TDMI: a 5stage pipeline of ARM9 core with Thumb extensions, debugging and Harvard Bus. The ARM7TDMI, the same production process, performance up to twice as many. Commonly used in working and settop boxes. ② system expansion Thumb: 16 cost of the system, to provide 32bit RISC performance, special attention is the required memory capacity is very small. ③ embedded ICE Debugging The integration of the ICElike CPU core debugging techniques, prototyping and systemonchip debugging has been greatly simplified. ④ microprocessor ARM710 series, including the ARM710, ARM710T, ARM720T and ARM740T: lowcost, low power consumption, packaging conventional system microprocessor with cache (Cache), memory management, write buffer and the JTAG. Widely used in handheld puting, data munications and consumer multimedia. ARM940T, 920T series: lowcost, low power, highperformance system microprocessor, with the Cache, memory management and the write buffer. Used in advanced engine management, security systems, settop boxes (STBs), portable puters and highend printer. The StrongARM: high performance, while meeting the needs of conventional application of a microprocessor, jointly developed with DEC and subsequently licensed to Int