【文章內(nèi)容簡(jiǎn)介】 .[10] [M].西安電子科技大學(xué)出版社，2005:7495.[11] Myke [J]，2003:3678.[12] [J].人民郵電出版社，2006:104123. 致謝本設(shè)計(jì)是在老師的指導(dǎo)下完成的。首先，感謝老師在論文的選題、設(shè)計(jì)方案的確定、設(shè)計(jì)的進(jìn)行以及最后的設(shè)計(jì)說明書的撰寫整個(gè)過程中給予我細(xì)心的指引和教導(dǎo)，使我能順利完成畢業(yè)設(shè)計(jì)。老師淵博的知識(shí)、敏銳的學(xué)術(shù)思維、嚴(yán)謹(jǐn)?shù)闹螌W(xué)態(tài)度、求實(shí)的科學(xué)態(tài)度和工作作風(fēng)以及創(chuàng)新的工作精神，令我終身受益，是我畢生學(xué)習(xí)的典范，值此論文完成之際，謹(jǐn)向王少杰老師致以崇高的敬意和衷心的感謝！除此以外，我還要感謝我實(shí)習(xí)公司各位給我技術(shù)幫助的各位前輩，在他們的幫助下我少走很多彎路，大大減少了我的設(shè)計(jì)工作量，以致我能準(zhǔn)時(shí)完成畢業(yè)設(shè)計(jì)，在此次設(shè)計(jì)中，我真的收獲很大，對(duì)51單片機(jī)的認(rèn)識(shí)和了解比以前提升了很多很多最后，感謝培養(yǎng)教育我的大學(xué)，其濃厚的學(xué)習(xí)氛圍，舒適的學(xué)習(xí)環(huán)境，我將終生難忘。在四年的大學(xué)生涯里，還得到眾多老師的關(guān)心支持和幫助。在此，謹(jǐn)向老師們致以忠心的感謝和崇高的敬意！附 錄附錄A：英文原文Structure and function of the MCS51 series Structure and function of the MCS51 series onechip puter MCS51 is a name of a piece of onechip puter series which Intel Company produces. This pany introduced 8 topgrade onechip puters of MCS51 series in 1980 after introducing 8 onechip puters of MCS48 series in 1976. It belong to a lot of kinds this line of onechip puter the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic position, basic performance and instruction system are all the same. 8051 daily representatives 51 serial onechip puters . An onechip puter system is made up of several following parts: (1) One microprocessor of 8 (CPU). (2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. (3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some onechip puters, such as 8031 , 8032, 80C ,etc.. (4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the puter. (6) Five cut off cutting off the control system of the source . (7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize onechip puter or onechip puter and serial munication of puter to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the abovementioned part was joined through the inside data bus .Among them, CPU is a core of the onechip puter, it is the control of the puter and mand centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 839。s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, e from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 onechip puters, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of . This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other puters, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is manded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of puter. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS51 series onechip puter and general puter disposes the way in addition. General puter for first address space, ROM and RAM can arrange in different space