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liance with cooperate strategy “。time to market”。 and “。profit margin maximum”。 to reinforce pany petitiveness in dynamic market order to fulfill technical support need to local key customers and further Ramp。amp。D requirement of testing capability and capacity I independently handle new characterization lab establishment covering plicated budget review, equipment list definition, logistic issue forecast, lab layout preparation, subcontractor selection, facility construction management, regular quality audit, final inspection and qualification etc. working with HR on lab engineer hiring collaborate with application and customer quality engineer in customerorientated manner on product plaint and quality issue feedback, technical consultation of diversified IC category outsourcing activities including supplier assessment, screening, management. Integrate supplier technical expertise into stepping up pany business profit margin。 cost reduction, product petitiveness for Leaving: organization change2020/06。2020/02Grace Semiconductor Manufacture CooperationIndustry: Electronics/Semiconductor/ICQRA Engineering Senior Engineer leader Responsibilities:To be partner with technical development organization and take leadership to conduct total qualification projects of advanced process reliability of CMOS technology. Take use of various quality analysis tools on process stability amp。amp。 normal deviation, evaluation of product lifetime, yield indicator like Cp, Cpk e