【正文】 BW xmm1, xmm2/m128Subtract packed word integers in xmm2/m128 from packed word integers in xmm1.0F FA /rPSUBD mm, mm/m64Subtract packed doubleword integers in mm/m64 from packed doubleword integers in mm.66 0F FA /rPSUBD xmm1, xmm2/m128Subtract packed doubleword integers in xmm2/mem128 from packed doubleword integers in xmm1.PSUBQPacked Subtract QuadwordOpcodeInstructionDescription0F FB /rPSUBQ mm1, mm2/m64Subtract quadword integer in mm1 from mm2 /m64.66 0F FB /rPSUBQ xmm1, xmm2/m128Subtract packed quadword integers in xmm1 from xmm2 /m128.PSUBSB/PSUBSWPacked Subtract with SaturationOpcodeInstructionDescription0F E8 /rPSUBSB mm, mm/m64Subtract signed packed bytes in mm/m64 from signed packed bytes in mm and saturate results.66 0F E8 /rPSUBSB xmm1, xmm2/m128Subtract packed signed byte integers in xmm2/m128 from packed signed byte integers in xmm1 and saturate results.0F E9 /rPSUBSW mm, mm/m64Subtract signed packed words in mm/m64 from signed packed words in mm and saturate results.66 0F E9 /rPSUBSW xmm1, xmm2/m128Subtract packed signed word integers in xmm2/m128 from packed signed word integers in xmm1 and saturate results.PSUBUSB/PSUBUSWPacked Subtract Unsigned with Saturation OpcodeInstructionDescription0F D8 /rPSUBUSB mm, mm/m64Subtract unsigned packed bytes in mm/m64 from unsigned packed bytes in mm and saturate result.66 0F D8 /rPSUBUSB xmm1, xmm2/m128Subtract packed unsigned byte integers in xmm2/m128 from packed unsigned byte integers in xmm1 and saturate result.0F D9 /rPSUBUSW mm, mm/m64Subtract unsigned packed words in mm/m64 from unsigned packed words in mm and saturate result.66 0F D9 /rPSUBUSW xmm1, xmm2/m128Subtract packed unsigned word integers in xmm2/m128 from packed unsigned word integers in xmm1 and saturate result.SUBPDPacked DoublePrecision FloatingPoint SubtractOpcodeInstructionDescription66 0F 5C /rSUBPD xmm1, xmm2/m128Subtract packed doubleprecision floatingpoint values in xmm2/m128 from xmm1.SUBPSPacked SinglePrecision FloatingPoint SubtractOpcodeInstructionDescription0F 5C /rSUBPS xmm1 xmm2/m128Subtract packed singleprecision floatingpoint values in xmm2/mem from xmm1.SUBSDScalar DoublePrecision FloatingPoint SubtractOpcodeInstructionDescriptionF2 0F 5C /rSUBSD xmm1, xmm2/m64Subtracts the low doubleprecision floatingpoint numbers in xmm2/mem64 from xmm1.SUBSSScalar SingleFP SubtractOpcodeInstructionDescriptionF3 0F 5C /rSUBSS xmm1, xmm2/m32Subtract the lower singleprecision floatingpoint numbers in xmm2/m32 from xmm1.PMULHUWPacked Multiply High UnsignedOpcodeInstructionDescription0F E4 /rPMULHUW mm1, mm2/m64Multiply the packed unsigned word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.66 0F E4 /rPMULHUW xmm1, xmm2/m128Multiply the packed unsigned word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1. PMULHWPacked Multiply High SignedOpcodeInstructionDescription0F E5 /rPMULHW mm, mm/m64Multiply the packed signed word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.66 0F E5 /rPMULHW xmm1, xmm2/m128Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1.PMULLWPacked Multiply Low SignedOpcodeInstructionDescription0F D5 /rPMULLW mm, mm/m64Multiply the packed signed word integers in mm1 register and mm2/m64, and store the low 16 bits of the results in mm1.66 0F D5 /rPMULLW xmm1, xmm2/m128Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the low 16 bits of the results in xmm1.PMULUDQMultiply Doubleword UnsignedOpcodeInstructionDescription0F F4 /rPMULUDQ mm1, mm2/m64Multiply unsigned doubleword integer in mm1 by unsigned doubleword integer in mm2/m64, and store the quadword result in mm1.66 OF F4 /rPMULUDQ xmm1, xmm2/m128Multiply packed unsigned doubleword integers in xmm1 by packed unsigned doubleword integers in xmm2/m128, and store the quadword results in xmm1.PMULUDQ instruction with 64Bit operands:DEST[630] DEST[310] * SRC[310]。DEST[12796] DEST[12796] * SRC[12796]。DEST[6332] DEST[6332] / (SRC[6332])。DEST[6332] APPROXIMATE((SRC[6332]))。DEST[12796] APPROXIMATE((SRC[12796]))。* DEST[630] unchanged *。 DEST[1] SRC[95]。PMOVMSKB instruction with 128bit source operand:r32[0] SRC[7]。PORBitwise Logical OROpcodeInstructionDescription0F EB /rPOR mm, mm/m64Bitwise OR of mm/m64 and mm.66 0F EB /rPOR xmm1, xmm2/m128Bitwise OR of xmm2/m128 and xmm1.PSLLDQPacked Shift Left Logical Double QuadwordOpcodeInstructionDescription66 0F 73 /7 ibPSLLDQ xmm1, imm8Shift left xmm1 by imm8 bytes, clearing loworder bits.PSLLW/PSLLD/PSLLQPacked Shift Left LogicalOpcodeInstructionDescription0F F1 /rPSLLW mm, mm/m64Shift words in mm left by amount specified in mm/m64, while shifting in 0s.66 0F F1 /rPSLLW xmm1, xmm2/m128Shift words in xmm1 register left by amount specified in xmm2/m128, while shifting in 0s.0F 71 /6 ibPSLLW mm, imm8Shift words in mm left by imm8, while shifting in 0s.66 0F 71 /6 ibPSLLW xmm1, imm8Shift words in xmm1 left by imm8.0F F2 /rPSLLD mm, mm/m64Shift doublewords in mm left by amount specified in mm/m64, while shifting in 0s.66 0F F2 /rPSLLD xmm1, xmm2/m128Shift doublewords in xmm1 left by amount specified in xmm2/m128, while shifting in 0s.0F 72 /6 ibPSLLD mm, imm8Shift doublewords in mm by imm8, while shifting in 0s.66 0F 72 /6 ibPSLLD xmm1, imm8Shift doublewords in xmm1 by imm8.0F F3 /rPSLLQ mm, mm/m64Shift mm l