【正文】 經(jīng)濟(jì)發(fā)展的主要能源。 3 國(guó)內(nèi)外發(fā)展概況及研究方向 儀器不斷更新。 4 2 系統(tǒng)概述 隨著超大規(guī)模數(shù)字集成電路、單片機(jī)技術(shù)的飛速發(fā)展，利用單片機(jī)及其它外圍芯片實(shí)現(xiàn)對(duì) 瓦斯的監(jiān)測(cè)成為一種可能，并且成為一種發(fā)展趨勢(shì)。 系統(tǒng)框圖 此次設(shè)計(jì)的煤礦瓦斯監(jiān)測(cè)報(bào)警器的系統(tǒng)框圖如下所示：主要由氣體傳感器、 A/D轉(zhuǎn)換器 ADC080單片機(jī) AT89C5 LED顯示電路、聲光報(bào)警裝置和附件電路組成。 (3)熱導(dǎo)式 熱導(dǎo)式是利用瓦斯與空氣熱導(dǎo)率之差來實(shí)現(xiàn)瓦斯?jié)舛鹊臏y(cè)定。但當(dāng)濃度大于 1%CH4時(shí)，其反應(yīng)遲鈍，選擇性和線性均較差，所以很少用于煤礦井下瓦斯?jié)舛鹊臋z測(cè)，而多用于可燃?xì)怏w的檢漏報(bào)警。此外，傳感器電源應(yīng)是經(jīng)過穩(wěn)壓的穩(wěn)壓源。 11 表 32 高濃度瓦斯試驗(yàn)放氣前后的數(shù)據(jù) (7)穩(wěn)定性 l)初始穩(wěn)定性 貯存一周到一年的元件初始零點(diǎn)輸出可能不為零，只需在工作點(diǎn)電壓穩(wěn)定十分鐘后輸出零點(diǎn)將歸零 貯存一周到一年的元件剛開 始下作時(shí)靈敏度可能達(dá)不到最佳點(diǎn)，只需在工作點(diǎn)電壓穩(wěn)定二十分鐘后輸出靈敏度將復(fù)原 2)長(zhǎng)期穩(wěn)定性 圖 35 長(zhǎng)期穩(wěn)定性 黑元件載體催化燃燒式元件，當(dāng)瓦斯氣體在元件表面與氧氣產(chǎn)生無焰燃燒時(shí)，電橋失去平衡，輸出一個(gè)電壓信號(hào)。瓦斯氣體敏感元件是采用熱催化原理探頭，電橋供電電壓為 3V。主體部分是采用逐次逼近式的 A/D轉(zhuǎn)換電路，由 CLK控制的內(nèi)部電路的工作 ,START為啟動(dòng)命令，高電平有效，啟動(dòng) ADC0809內(nèi)部的 A/D轉(zhuǎn)換，當(dāng)轉(zhuǎn)換完成，輸出信號(hào) EOC有效， OE為輸出允許信號(hào)，高電平有效，打開輸出三態(tài)緩沖器 ,把轉(zhuǎn)換后的結(jié)果送 DB。 15 ALE：地址鎖存選通信號(hào)，輸入高電平有效。 GND：接地。計(jì)算機(jī)在執(zhí)行程序的過程中，由于 CPU以外的某種原因，有必要盡快中止當(dāng)前程序的執(zhí)行，而去 17 執(zhí)行相應(yīng)的處理程序，在處理結(jié)束后，再回來繼續(xù)執(zhí)行被中止了的源程序。在內(nèi)部的 T瓦斯 N中有四位是與外中斷有關(guān)的。 TI、 RI：串行口發(fā)送、接收中斷。 除 PC之外，復(fù)位操作還對(duì)其它一些專用寄存器有影響，他們的復(fù)位狀態(tài)如下； PC 0000H T瓦斯 N 00H ACC 00H TLO 00H PSW 00H TH0 00H SP 07H TL1 00H DPTR 0000H TH1 00H P0— P3 0FFH S瓦斯 N 00H IP xx000000B SBUF 不定 IE 0x000000B P瓦斯 N 0xx0000B TMOD 00H 復(fù)位操作還對(duì)單片機(jī)的個(gè)別引腳信號(hào)有影響，例如把 ALE和 PSEN 信號(hào)變?yōu)闊o效狀態(tài)，即 ALE = 0， PSEN = 1。 AT89C51單片機(jī)為很多嵌入式控制系統(tǒng)提供了一種靈活性高且價(jià)廉的方案。 128 8位內(nèi)部 RAM 掉電方式保存 RAM中的內(nèi)容，但振蕩器停止工作并禁止其它所有部件工作直到下一個(gè)硬件復(fù)位。 P1口管腳寫入 1后，被內(nèi)部上拉為高，可用作輸入， P1口被外部下拉為低電平時(shí)，將輸出電流，這是由于內(nèi)部上拉的緣故。 P3口： P3口管腳是 8個(gè)帶內(nèi)部上拉電 阻的雙向 I/O口，可接收輸出 4個(gè) TTL門電流。在平時(shí)， ALE端以不變的頻率周期輸出正脈沖信號(hào)，此頻率為振蕩器頻率的1/6。在由外部程序存儲(chǔ)器取指期間，每個(gè)機(jī)器周期兩次 /PSEN有效。 用戶還可以采用外部時(shí)鐘，在這種情況下，外部時(shí)鐘脈沖接到 XTAL1部 時(shí)鐘發(fā)生器的輸入端， XTAL2則懸空。 CPU 響應(yīng)中斷后，應(yīng)在中斷服務(wù)程序中使 OE 線變?yōu)楦唠娖?，以提?A/D 轉(zhuǎn)換后的數(shù)字量。 聲光報(bào)警單元與單片機(jī)的連接圖如下： P P P P P P P P P P P P P P P X T A L 2X T A L 1R X DT X DR S TV S SIN T 0WRP RDP P P ALEA T 8 9C 51紅黃綠R3R4R5Q58 55 0R21KR31 0KV C CU 13B U Z Z E R 圖 311 聲光報(bào)警電路 LED 顯示 LED數(shù)碼顯示器是一種由 LED發(fā)光二極管組合顯示字符的顯示器件。 本設(shè)計(jì)通過觀察 LED數(shù)碼顯示器顯示瓦斯?jié)舛戎?，判斷瓦斯?jié)舛戎凳欠癯^上限值，如果超過，自動(dòng)報(bào)警。 //數(shù)碼管控制引腳 31 sbit LED2 = P2^6。 i++)。 //等待轉(zhuǎn)換結(jié)束 ADC_OE=1。 //關(guān)顯示 P2=P2 amp。 unsigned char data baifenshu[4]。 // ADC_OE=0。//計(jì)算 放大到 0－1000，注 意化簡(jiǎn)，不然會(huì)計(jì)算溢出得不到正確結(jié)果 //ad_shuju*1000/255。 for(t=0。 } } } 35 致 謝 首先，我要感謝 *************大學(xué)，感謝電氣系對(duì)我四年的培養(yǎng)，讓我學(xué)到了許許多多的知識(shí)，感謝各位老師在這四年里對(duì)我的關(guān)懷與照顧，在此致以我深深的謝意。s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, e from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is deposited, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The 40 content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 onechip puters, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of . This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other puters, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is manded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of puter. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 bytes that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS51 series onechip puter and general puter disposes the way in addition. General puter for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of 41 Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in uni