【正文】 LVDS48p (DQ0T1)186IO, LVDS48n (DQ0T0)185IO, LVDS49p184IO, LVDS49n183IO, LVDS50p182IO, LVDS50n181U1BEP1C12Q240C8BANK 3IO, LVDS51p180IO, LVDS51n179IO, LVDS52p178IO, LVDS52n177IO, VREF0B3176IO (DQ1R0)175IO, LVDS53p (DQ1R1)174IO, LVDS53n (DQ1R2)173IO, DPCLK4 (DQS0R)170IO, LVDS54p (DQ1R3)169IO, LVDS54n168IO, LVDS55p167IO, LVDS55n166IO, LVDS56p165IO, LVDS56n164IO, LVDS57p163IO, LVDS57n162IO, LVDS58p161IO, LVDS58n160IO, LVDS59p159IO, LVDS59n (DM1R)158IO, VREF1B3156IO, PLL2_OUTp144IO, PLL2_OUTn143IO, LVDS68p141IO, LVDS68n140IO, LVDS69p139IO, LVDS69n138IO, LVDS70p137IO, LVDS70n136IO, LVDS71p135IO, LVDS71n134IO, LVDS72p (DQ1R4)133IO, LVDS72n (DQ1R5)132IO, DPCLK5 (DQS1R)131IO (DQ1R6)128IO, VREF2B3127IO, LVDS73p126IO, LVDS73n (DQ1R7)125IO, LVDS74p124IO, LVDS74n123IO, LVDS75p122IO, LVDS75n121U1CEP1C12Q240C8BANK 4IO, LVDS76n120IO, LVDS76p119IO, LVDS77n118IO, LVDS77p117IO, LVDS78n (DQ1B0)116IO, LVDS78p (DQ1B1)115IO, LVDS79n (DQ1B2)114IO, LVDS79p (DQ1B3)113IO, DPCLK6 (DQS0B)108IO, VREF0B4107IO106IO, LVDS80n105IO, LVDS80p104IO, LVDS85n101IO, LVDS85p100IO, LVDS86n99IO, LVDS86p98IO, LVDS87n95IO, LVDS87p (DM1B)94IO, VREF1B493IO, LVDS92p88IO, LVDS93n87IO, LVDS93p86IO, LVDS94n85IO, LVDS94p84IO, LVDS95n83IO, LVDS95p82IO, LVDS96p79IO, LVDS97n78IO, LVDS97p (DQ1B4)77IO, LVDS98n (DQ1B5)76IO, LVDS98p75IO, VREF2B474IO, DPCLK7 (DQS1B)73IO, LVDS99n (DQ1B6)68IO, LVDS99p (DQ1B7)67IO, LVDS100n66IO, LVDS100p65IO, LVDS101n64IO, LVDS101p63IO, LVDS102n62IO, LVDS102p61U1DEP1C12Q240C8I/O1I/O2I/O3I/O4I/O5I/O6I/O7I/O8I/O11I/O12I/O13I/O14I/O15I/O16I/O17I/O18I/O19I/O20I/O21I/O23I/O38I/O39I/O41I/O42I/O43I/O44I/O45I/O46I/O47I/O48I/O49I/O50I/O53I/O54I/O55I/O56I/O57I/O58I/O59I/O60I/O1 I/O2I/O3 I/O4I/O5 I/O6I/O7 I/O8I/O11 I/O12I/O13 I/O14I/O15 I/O16I/O17 I/O18I/O19 I/O20I/O21 I/O23I/O38 I/O39I/O41 I/O42I/O43 I/O44I/O45 I/O46I/O47 I/O48I/O49 I/O50I/O53 I/O54I/O55 I/O56I/O57 I/O58I/O59 I/O601 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44P2Header 22X21 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44P3Header 22X2I/O181I/O182I/O183I/O184I/O185I/O186I/O187I/O188I/O196I/O197I/O193I/O194I/O195I/O200I/O201I/O202I/O203I/O206I/O207I/O208I/O213I/O214I/O215I/O216I/O217I/O218I/O219I/O222I/O223I/O224I/O225I/O226I/O227I/O228I/O233I/O234I/O235I/O236I/O237I/O238I/O239I/O240I/O1811 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44P1Header 22X21 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44P4Header 22X2I/O182I/O183 I/O184I/O185 I/O186I/O187 I/O188I/O193 I/O194I/O195 I/O196I/O197 I/O200I/O201 I/O202I/O203 I/O206I/O207 I/O208I/O213 I/O214I/O215 I/O216I/O217 I/O218I/O219 I/O222I/O223 I/O224I/O225 I/O226I/O227 I/O228I/O233 I/O234I/O235 I/O236I/O237 I/O238I/O239 I/O240I/O121I/O122I/O123I/O124I/O125I/O126I/O127I/O128I/O131I/O132I/O133I/O134I/O135I/O136I/O137I/O138I/O139I/O140I/O141I/O143I/O144I/O156I/O158I/O159I/O160I/O161I/O162I/O163I/O164I/O165I/O166I/O167I/O168I/O169I/O170I/O173I/O174I/O175I/O176I/O177I/O178I/O179I/O180I/O121 I/O122I/O123 I/O124I/O125 I/O126I/O127 I/O128I/O131 I/O132I/O133 I/O134I/O135 I/O136I/O137 I/O138I/O139 I/O140I/O141 I/O143I/O156I/O161I/O165I/O167I/O169I/O173I/O175I/O177I/O179I/O180I/O61I/O62I/O63I/O64I/O65I/O66I/O67I/O68I/O73I/O74I/O75I/O76I/O77I/O78I/O79I/O82I/O83I/O84I/O85I/O86I/O87I/O88I/O93I/O94I/O95I/O98I/O99I/O100I/O101I/O104I/O105I/O106I/O107I/O108I/O113I/O114I/O115I/O116I/O117I/O118I/O119I/O120I/O61 I/O62I/O63 I/O64I/O65 I/O66I/O67 I/O68I/O73 I/O74I/O75 I/O76I/O77 I/O78I/O79 I/O82I/O83 I/O84I/O85 I/O86I/O87 I/O88I/O93 I/O94I/O95 I/O98I/O99 I/O100I/O101 I/O104I/O105 I/O106I/O107 I/O108I/O113 I/O114I/O115 I/O116I/O117 I/O118I/O119 I/O120I/O144I/O158 I/O159I/O160I/O162 I/O163I/O164I/O166I/O168I/O170I/O174I/O176I/O178TDIDATA0nCECONF_DONEnCONFIGnCSOnCSOPLLVAU_ 電源模塊電源模塊 .SchDocCLKINVCC3_3U_ 時鐘模塊時鐘模塊 .SchDocCONF_DONEnCONFIGDATA0DCLKnCSOASDOnSTATUSINIT_DONEnCETCKTDOTMSTDIU_ 配置模塊配置模塊 .SchDocASDOASDOASDOnCSOVCC3_3 圖 5 核心板原理圖 FPGA 器件 （實現(xiàn) DDS功能，產生 MSK調制信號） 鍵盤（復位） 高速 DA轉換 波形數(shù)據(jù) 模擬波形 時鐘信號（晶振） 重慶文理學院本科生畢業(yè)論文 (設計 ) 第 9 頁，共 25 頁 觀察上述原理圖，可以發(fā)現(xiàn)，在該原理圖中有三個不同顏色的模塊，它們分別是電源模塊、時鐘模塊和配置模塊， 這三個模塊都是 FPGA 核心板的重要組成部分。配置芯片采用 EPCS1。 M4K RAM 塊可用于實現(xiàn)真正的雙端口、簡單的雙端口或單端口存儲器，最大數(shù)據(jù)寬度為 36 位，最大速度為 250MHz。 Cyclone 器件采用二維行 列不實現(xiàn)定制邏輯，但不同速度的行與列連接邏輯陣列和嵌入式存儲塊連接在一起。這樣就得到了相應的MSK 已調波。 MSK 信號的表達式可正交展開為 ? ? c o s c o s c o s c o s s in s in22k c k k cbbS t x t t x t tTT??? ? ?? ? ? ???? ? ? ?? ? ? ? （ 10） 令 cos kkxI? ， cosk k KxQ???，則 ，上式可變換為： ? ? c o s c o s s in s in22k c k cbbS t I t t Q t tTT????? ? ? ???? ? ? ?? ? ? ? （ 11） 根據(jù)式 （ 11） 就可以構成一種 MSK 調制器。 MSK 調制，它的英文名是 Minimum Frequency Shift Keying Modulation，即最小移頻鍵控調