基于fpga的fsk調(diào)制解調(diào)-免費閱讀
【正文】 通過本次設(shè)計，了解了頻移鍵控數(shù)字通信系統(tǒng)的用途及工作原理，熟悉了FSK基于VHDL語言的設(shè)計步驟，提高了繪圖能力，鍛煉了設(shè)計實踐和語言組織能力，培養(yǎng)了自己獨立設(shè)計能力。仿真波形輸出文件FSKJT Simulation Report將自動彈出如圖14所示。用鼠標(biāo)將時鐘信號節(jié)點clk、start、x、y、q、m和xx分別拖到波形編輯窗口，如圖13所示，此后關(guān)閉Nodes Found窗口即可。以FSK調(diào)制的輸出作為FSK解調(diào)的輸入。⑤文件存盤選擇File中的Save as項。③輸入工程信號節(jié)點選擇View菜單中的Utility Windows項的Node Finder，在此對話框Filter項中選擇Pins:allamp。FPGA課程設(shè)計——測試4 測 試 FSK調(diào)制仿真工程編譯通過后，必須對其功能和時序性能進(jìn)行仿真測試，以驗證設(shè)計結(jié)果是否滿足設(shè)計要求。 END IF。 END IF。EVENT AND CLK=39。 系統(tǒng)時鐘 START:IN STD_LOGIC。 END IF。 PROCESS(CLK,X) 此進(jìn)程完成對基帶信號的FSK調(diào)制 BEGIN IF (CLK39。139。139。 ELSE F1=39。039。 調(diào)制信號END FSKTZ。圖5 非相干解調(diào)法原理框圖三、FSK的解調(diào)方框圖及電路符號圖6 FSK解調(diào)方框圖圖7 FSK解調(diào)電路符號13FPGA課程設(shè)計——設(shè)計方案3 設(shè)計方案 FSK基于VHDL語言調(diào)制程序文件名： FSKTZ功能：基于VHDL硬件描述語言，對基帶信號進(jìn)行FSK調(diào)制LIBRARY IEEE。它有兩個獨立的振蕩器，數(shù)字基帶信號控制轉(zhuǎn)換開關(guān)，選擇不同頻率的高頻振蕩信號實現(xiàn)FSK調(diào)制。，在利用VHDL語言對FSK頻移鍵控系統(tǒng)進(jìn)行調(diào)制、解調(diào)的波形仿真。關(guān)鍵字 VHDL語言，F(xiàn)SK調(diào)制，F(xiàn)SK解調(diào)ⅠABSTRACTThe modem munication system is the key equipment, its performance has a direct relationship to the entire system performance. After nearly two weeks of experiments, we four members together, use Quartus II in the software of VHDL language to FSK FSK system will do modulation and demodulation of the program design. Finally made FSK modem. The design of FSK modems are: to determine the parameters of f1 = MHz, f2 = 2 MHz, modulation signal f = 1 MHz. The design of FSK circuit can be widely used in remote control system and frequency shift in munications. Utilize FSK modulator way of main advantage is: (1) no carrier recovery, and greatly reduce the system plexity. (2) the amplitude of the nonlinear of antijamming ability. Because FSK signal is a constant envelope signal, the information is fully contained in the signal zero, so, the amplitude modulated signal than by nonlinear antiinterference ability is ambitious. (3) demodulation is easy to use software and hardware realization, simple and understandable.Key word VHDL Language, FSK make, FSK solution adjustⅡFPGA課程設(shè)計目 錄摘 要…………………………………………………………………………………Ⅰ
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