【正文】 Encoding Example: ? Note that the number of ones and zeros in the currently chosen encoding works to balance out the offset in the number of ones and zeroes (tracked by the Running Disparity value) from the previous encoding . : Don’t confuse the definition of Positive Disparity with the RD+ encoding choice! Positive Disparity means there is a current running total of more ones than zeros! Thus, an RD+ encoding generally has more zeros than ones! ? Also note that it is possible that the 4bit subblock of a RD or RD+ symbol encoding can yield a negative or positive disparity, respectively thus forcing more than one RD encoding to be used consecutively… 64 12/4/2020 Differential Signaling 下載 Summary: Example conversion HEX Data Byte (8b) to be Encoded OR Binary Data Byte (8b) to be Encoded 10b Encoded symbol (RD) 10b Encoded symbol (RD+) F1 100011 0111 100011 0001 1111 0001 65 12/4/2020 Differential Signaling 下載 Possible Patterns… ? Repeating Comma [] Pattern (RD followed by RD+): 001111 1010 110000 0101 001111 1010 110000 0101 (RD) (RD+) (RD) (RD+) 6 bit encoding starts with an RD and uses an positive disparity encoding….6 bits encoding yields an RD+…..4bit encoding starts with a RD +…4bit encoding picks a negative (or neutral encoding) and thus yields a neutral and thus keeps the RD+. Checks out…. ? Low Frequency Pattern?? ( (RD followed by RD) 011110 0100 011110 0100 011110 0100 011110 0100 (RD) (RD) (RD) (RD) 100001 1011 100001 1011 100001 1011 100001 1011 (RD+) (RD+) (RD+) (RD+) 66 12/4/2020 Differential Signaling 下載 Possible Patterns… ? High transition density/frequency pattern: (RD followed by RD+) 101010 1010 101010 1010 101010 1010 101010 1010 (RD) (RD+) (RD) (RD+) ? Low transition density pattern: (RD) amp。 the 5 bit subblock (EDCBA) is encoded into 6 new bits (abcdei) HGFEDCBA notation monly represents the unencoded bits, and abcdeifghj represents the encoded bits。 out of phase. The receiver, a differential amplifier, recovers the signal as the difference in the voltages on the two lines. ? Advantages of differential signaling can be summed up as follows Differential Signaling is not sensitive to SSO noise. A differential receiver is tolerant of its ground moving around. If each “wire” of pair is on close proximity of one and other. electromagic interference imposes the same voltage on both signals. The difference cancels out the effect. Since the AC currents in the “wires” are equal but opposite and proximal, radiated EMI is reduced. Signals passing from one board to another are not subject to the local ground disturbances. As frequencies increase beyond 1GHz, up to 80% of the signal may be lost, but difference still crosses 0 volts. There are still loss issues for differential signaling but only e into play in high loss system. Most single ended systems assume approximately 15% channel loss. 6 12/4/2020 Differential Signaling 下載 Differential Signaling Cons ?The cost is doubling the signal wires, but this may not be so bad as pared to adding grounds to improve single ended signaling. ?Routing constraint: Pair signals need to be routed together. ?Differential signal have certain symmetry requirements that may pose routing challenges. 7 12/4/2020 Differential Signaling 下載 Differential Signal Parameters ? Voltage on line 1 = a ? Voltage on line 2 = b ? Differential voltage d = ab ? Common mode voltage c= (a+b)/2 ? Odd mode signal, o = (ab)/2 ? Even mode signal, e = (a+b)/2 ? Signal on line 1 a = e+o ? Signal on line 2 b = eo ? Useful relations。 ?The 6 bit sub block disparity value is then used as the starting disparity when the running disparity calculated for the 4 bit subblock ?The running disparity for the entire 10 bit symbol is now the same as the running disparity found at the end of the 4 bit subblock (and the running disparity at the beginning of the next symbol / 6 bit subblock is the same as that found at the end of the this symbol) ? Again, a given subblock or symbol can have an actual disparity number of either a zero (neutral), +2 or –2, though the Running Disparity is only said to be Positive, Negative or Neutral. 60 12/4/2020 Differential Signaling 下載 8b/10b Running Disparity Calculation Algorithm: ? Assumptions: The 8b to 10b encoding has already been done。 (RD) 011110 0001 101100 1000 011110 0001 101100 1000 (RD) (RD) (RD) (RD) 67 12/4/2020 Differential Signaling 下載 References ? Infiniband Architecture Release Specification October 24, 2020, Volume 2, Section (beginning with page 66) ? Franaszek amp。 ) D/K = Signifies Data or Control a = 5 bit block to be encoded b = 3 bit block to be encoded ? Set of Available Data and Control Characters Data () , , .... – All 256 Possible 8bit Data characters (00 through FF HEX) Control () – , , , , 56 12/4/2020 Differential Signaling 下載 8b/10b DC balancing amp。12/4/2020 Differential Signaling Introduction Reading Chapter 6 2 12/4/2020 Differential Signaling 下載 Agenda ? Differential Signaling Definition ? Voltage Parameters Common mode parameters Differential mode parameters ? Current mode logic (CML) buffer Relate to parameters Modeling amp。 (nomenclature: amp。 (RD+) 1100110110 0011000110 1100110110 0011000110 (RD) (RD+) (RD) (RD+) ? Composite pattern: (RD) amp。 A current disparity value is already assumed ? Process: Calculate the disparity for the leftmost 6 bits first, keeping in mind the current disparity