【正文】
51BH, 80C31BH,etc., their basic position, basic performance and instruction system are all the daily representatives51 serial onechip puters. A onechip puter system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. (3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some onechip puters, such as 8031, 8032.(4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the puter. (6) Five cut off cutting off the control system of the source. (7) One all duplex serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize onechip puter or onechip puter and serial munication of puter to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertz now at most. Every the abovementioned part was joined through the inside data bus .Among them, CPU is a core of the onechip puter, it is the control of the puter and mand centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporaries of 8, storing device 2 temporarily, 839。 when resistance value is very large, P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw electric current load to offer outwards, draw the resistance on needn39。clock, can output W line signal. At the time of programming, it is that the first function is still the second function but needn39。s head and monitor the pin with the oscilloscope tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change. MCS51系列單片機(jī)的功能和結(jié)構(gòu) MSC51 系列單片機(jī)具有一個(gè)單芯片電腦的結(jié)構(gòu)和功能,它是英特爾公司的系列產(chǎn)品的名稱。 一個(gè)單芯片的計(jì)算機(jī)是由以下幾個(gè)部分組成:( 1)一個(gè) 8 位的微處理器( CPU)。( 5)兩個(gè)定時(shí) /計(jì)數(shù)器, 每個(gè)定時(shí)方式也可以根據(jù)計(jì)算結(jié)果或定時(shí)控制實(shí)現(xiàn)計(jì)算機(jī)。其中 CPU 是一個(gè)芯片計(jì)算機(jī)的核心,它是計(jì)算機(jī)的指揮中心,是由算術(shù)單元和控制器等部分組成。振蕩器和定時(shí)電路等的程序計(jì)數(shù)器是一個(gè)由 8 個(gè)計(jì)數(shù)器為 2,總計(jì) 16 位。這種脈沖信號(hào),作為 8051 的工作,即單位時(shí)間的最低基本節(jié)奏。數(shù)據(jù)80518751 的內(nèi)存數(shù)據(jù)存儲(chǔ)器 128B)條 8031,地址虛假 00FH,中層結(jié)果存入操作使用,數(shù)據(jù)存儲(chǔ)和數(shù)據(jù)暫時(shí)緩沖等。在訪問內(nèi)存,相應(yīng)的,只有一個(gè)地址的內(nèi)存單 元,可以用外部存儲(chǔ),也可以內(nèi)存,并通過訪問順序與此類似。但是,從用戶使用, 8051 的內(nèi)存地址空間分為三種:分為( 1)片內(nèi),(使用 16 個(gè)地址一致的 FFFFH,地點(diǎn)為0000H)。 8051 單芯片的電腦有 4 個(gè) 8 步行并進(jìn)的 I/O 端口,分別為 P0,P1,P2和 P3。使數(shù)據(jù)能鎖存輸出時(shí),數(shù)據(jù)緩沖區(qū)時(shí),可以引 進(jìn),但 4 個(gè)通道這些自我相同的功能。熟悉 I/O端口的邏輯電路,不僅有助于正確和合理利用端口,并在一定程度上將有助于設(shè)計(jì)周邊的單芯片計(jì)算機(jī)的邏輯電路。當(dāng)被用作數(shù)據(jù),應(yīng)該寫“ 1”到內(nèi)部,每一個(gè) P0 口與一個(gè)可以驅(qū)動(dòng) 8 型號(hào) LS TTL 負(fù)載出口。另一條是它可以導(dǎo)致在來兩個(gè)工作狀態(tài)密切,使其電阻值變化近似 0 或 2 阻值的情況非常嚴(yán)重。相對(duì)約 20200 歐姆,因?yàn)樵诂F(xiàn)場(chǎng),負(fù)載電阻和40000 歐姆,不會(huì)產(chǎn)生對(duì)輸入的數(shù)據(jù)的影響。法令: Q=1 時(shí),可以輸出 W 線路信號(hào),在制定方案的時(shí)候,那就是第一個(gè)函數(shù)仍是第二個(gè)功能,但不必軟件預(yù)先設(shè)置 P3 口。因?yàn)樗麄兝幂敵黾?jí)阻力,可以打開漏源電阻以敦促打開方式,不需要有阻力。其主要功能是把最初的 PC 為0000H,使單芯片電腦開始持有單位 0000H 開始執(zhí)行程序的行為。如果是有頻率 6,恢復(fù)位的信號(hào)持續(xù)時(shí)間應(yīng)超過 4 微秒完成恢復(fù)。作為恢復(fù)到電路,其功能是非常重