dsp原理與應(yīng)用---第1章 dsp概述-預(yù)覽頁
【正文】 C5421 200 MIPS C5441 532 MIPS C55xTM Multicore Software Compatible C5407 120 MIPS C5401 50 MIPS C5402 100160 MIPS C5409 80160 MIPS C5410 100160 MIPS C5416 120160 MIPS Over 500 Million Shipped C54xTM DSP World’s Most Popular DSP $5 Billion in Designins C55xTM DSP Best DSP Microprocessor Report DSP Product of the Year Inter Telephony EDN 2022 DSP C5404 120 MIPS ?DSL modems ?Pooled modems ?Base station transceivers ?Wireless LAN ?Enterprise PBX ?Speech recognition ?Multimedia gateway ?Professional audio ?Networked camera ?Machine vision ?Security identification ?Industrial scanner ?High speed printer ?Advanced encryption Broadband Communications Wireless 3G Base Stations Medical Imaging C6000系列 DSP的應(yīng)用 C6000系列 DSP 子系列 ? C62x子系列： 32位定點(diǎn) DSP、 1200～ 2400MIPS ? 代表器件： TMS320C6211 ? C67x子系列： 32位 浮點(diǎn) DSP、 1200～ 1800MIPS， 900～1350MFLOPS ? 代表器件： TMS320C671 C671 C671 C672 C6726 ? C64x子系列： 32位定點(diǎn) DSP， 4000～ 5760MIPS ? 代表器件： TMS320C6641 C641 C6416 ? Load Store Architecture ? CPU ? Dual Data Path ? 8 functional units ? 8 32bit instructions/cycle ? 32bit Address Range ? Integer Instruction Features ? Data byte addressable (8, 16, 32bit data) ? 8bits overflow protection ? Saturation ? Bitfield extract, set, clear ? Bit counting ? Normalization Advanced VLIW CPU (VelociTI?) C62x／ C67x Interrupts Control Registers Control Logic Emulation Test Program Fetch Instruction Dispatch Instruction Decode Data Path 1 A Register File Data Path 2 B Register File L2 S2 M2 D2 D1 M1 S1 L1 TMS320C6713 – 225MHz Audio DSP McBSP1 OR 225 MHz C67x DSP core ? 225MHz /1800 MIPS/1350 MFLOPS ? 32/64bit native processing TMS320C6713 FloatingPoint DSP 16channel EDMA 32bit EMIF Two McBSPs 16bit HPI Two IIC Ports C67xTM DSP Core Level 1 Program Cache 4K Bytes OR McBSP 0 2 Timers Large onchip memory ? Increased RAM – eliminates the need for costly external RAM Level 2 Cache/Memory 256K Bytes SRAM Level 1 Data Cache 4K Bytes McASP 0 Two new Multichannel Audio Serial Ports (McASP) ? Up to 16 stereo channels of IIS ? Up to 4 different clock rates ? Compatible with S/PDIF transmit protocol OR HPI GPIO EMIF Enhanced DMA Controller (EDMA) 16 Channel IIC 1 IIC 0 McASP 1 DM642 DSP — Highest DSP Performance with Flexible OnChip Video Integration SDRAM 600/500 Mhz DSP ? Industryleading performance in micron copper process 23x23sqmm flipchip BGA package ? Maximizes channel density 66MHz PCI ? Connects to backplane chassis or PCI bus 10/100 Ether MAC ? Connects to IP packet works 64bit wide 133MHz 10/100 Ether MAC C64xTM DSP Core L2 Cache/Memory 256 KBytes Enhanced DMA Controller Video port0 Video port1 Video port2 McASP EMIF 66MHz PCI TMS320DM642 DSP L1D Cache L1P Cache Three DualChannel Video Ports ? Two video channels per port software configurable as input or output ? Video filtering, horizontal scaling ? Glueless interface to video system ponents ? Support BT656, digital TV formats (SDTV and HDTV), raw video I/O ? 8bit/10bit/16bit/20bit video support per port McASP ? Multichannel audio serial port ? Up to 16 stereo lines (32 channels) C6000 Catalog Roadmap Software Compatible Performance C67HP MultiCore Feature Integration C64x +RISC C67LC C64LC C6416 C6415 C6414 C6411 DM64xTM C6712C C6711C C6713 C6203 C6701 C6711 C6201 C6204 C6211 C6712 C6205 C6202 C64xTM DSP Best DSP of 2022 InStat/MicroDesign Resources 2022 Innovation of the Year EDN Magazine 學(xué)習(xí)文檔 ? C6000學(xué)習(xí)的四類文檔 ： 新手上路： quick star 教程： tutorial 系統(tǒng)原理：必讀，調(diào)試的基石， 資料手冊(cè)：查閱 ? help?tutorial； help?content ,豐富的內(nèi)容 ? CCS目錄 \docs\pdf\ ? 新手上路 SPRU509 Code Composer Studio Getting Started Guide， Provides basic procedures in program development flow order to help you begin programming Code Composer Studio. SPRU405 Code Composer Studio IDE Quick Start， Getting started quickly. SPRU415 Code Composer Studio Online Documentation， Getting started quickly. SPRU426 DSP/BIOS Quick Start Reference Guide， Getting started quickly. ? 網(wǎng)站
教學(xué)課件相關(guān)推薦
鄂ICP備17016276號(hào)-1