【正文】 defg8 dp dp9U9abfcgdeVC1234567abcdefg8 dp dp9U12VCVC圖 顯示電路與單片機(jī) AT89C51 連接示意圖AT89C51 的 RXD 引腳與驅(qū)動(dòng)芯片 74LS164 的 A,B 引腳相連，TXD 引腳與74LS164 的 CLR 引腳相連，如圖 所示。需要指出的是,由于74LS164 無(wú)并行輸出控制端,因而在串行輸入過(guò)程中,其輸出端的狀態(tài)會(huì)不斷變化,造成不應(yīng)顯示的字段仍有較暗的亮度,影響了顯示的效果。本科生畢業(yè)設(shè)計(jì)（論文）25第 5 章 結(jié) 論本次畢業(yè)設(shè)計(jì)是基于單片機(jī)的濕度檢測(cè)系統(tǒng)的設(shè)計(jì)，它是最常見(jiàn)的和最典型的過(guò)程控制系統(tǒng)，本設(shè)計(jì)主要針對(duì) 51 型單片機(jī)在檢測(cè)相對(duì)過(guò)程控制方面的應(yīng)用，分析濕度控制系統(tǒng)實(shí)例。而本次設(shè)計(jì)正是鑒于單片機(jī)在這方面的優(yōu)異性能 ,來(lái)設(shè)計(jì)一種用單片機(jī)濕度控制系統(tǒng)。在這段時(shí)間里，不僅大大提高了我的實(shí)踐經(jīng)驗(yàn)，也使我學(xué)到了許多書(shū)本上不曾接觸的知識(shí)，開(kāi)拓了視野，擴(kuò)大了知識(shí)面，最重要的是學(xué)到了如何利用信息資源幫助自己尋找資料，提高了自己的自學(xué)能力。s humidity, relative humidity take 60%~70% as good, the winter should better not be lower than 50%, summer is not bigger than 80%. If the humidity is oversized, extremely easy to cause clothes leather to be affected with damp mildewy。 Spring the bacterium multiplies, easy to induce the respiratory disease, rheumatism。s physical property and the physical characteristics will also have the varying degree change, if the ambient humidity control will not be good, also will have the enormous influence to the test result and the product quality.AT89C51:The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM). Thedevice is manufactured using Atmel’s high density nonvolatile memory technologyand is patible with the industry standard MCS51? instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, a five vector twolevel interrupt 本科生畢業(yè)設(shè)計(jì)（論文）30architecture,a full duplex serial port, onchip oscillator and clock , AT89C51 may defer to the conventional method to carry on the programming, also may the online programming. It will use in mon the microprocessor and the Flash memory will unify in together, specially might repeatedly scratch the Flash memory which will write to be possible effectively to reduce the development cost.Pin Description:Port 0:Port 0 is an 8bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance 0 may also be configured to be the multiplexed loworder，address/data bus during accesses to external program，and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programing,and outputs the code bytes during program pullups are required during program verification.Port 1:Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal 1 also receives the loworder address bytes during Flash programming and verification.Port 2:Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current (IIL) because of the internal 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX DPTR). In this application it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX RI), Port 2 emits the contents of the P2 Specia。 The winter will accelerate the hot conduction, will make one feel twice as coldly. Obviously humidity to person daily life importance. The humidity is not very only important to the home life39。 The electric appliance and the precision instrument are affected with damp suffer injury。在論文完成之際，我首先謹(jǐn)向在我做畢業(yè)設(shè)計(jì)期間給予我無(wú)微不至關(guān)懷的王宇老師致以真誠(chéng)的謝意，然后向在大學(xué)期間向我們傳授知識(shí)，提高素質(zhì)的各位遼寧工業(yè)大學(xué)的教師表示感謝，最后對(duì)朝夕相處的同學(xué)在畢業(yè)設(shè)計(jì)期間給予我的支持和幫助送上我深深的謝意。從最基本的做起,慢慢熟悉到熟練我們的工作,把我們所學(xué)的運(yùn)用到工作中去。由于單片機(jī)的計(jì)數(shù)頻率上限底（12MHz 晶振時(shí)約為 500KHz） ，所以需對(duì)高頻被測(cè)信號(hào)進(jìn)行硬件預(yù)分頻處理，AT89C51 則完成運(yùn)算、控制及顯示功能。開(kāi)始初始化讀取采樣間隔數(shù)據(jù)采樣時(shí)間到？讀取采樣數(shù)據(jù)AD 轉(zhuǎn)換結(jié)果儲(chǔ)存顯示YN返回圖 數(shù)據(jù)采集子程序流程圖本科生畢業(yè)設(shè)計(jì)（論文）23 鍵盤(pán)部分：初始化開(kāi)始運(yùn)行啟動(dòng) AD 轉(zhuǎn)換設(shè)定鍵按下？顯示當(dāng)前設(shè)定濕度設(shè)定濕度 加一減一確定鍵按下？YNYN返回圖 鍵盤(pán)子程序流程圖本科生畢業(yè)設(shè)計(jì)（論文）24 報(bào)警部分：進(jìn)入中斷處理讀取 A/D 轉(zhuǎn)換結(jié)果超出范圍？過(guò)高？加濕 除濕報(bào)警延時(shí)程序返回YYNN圖 報(bào)警子程序流程圖主要實(shí)現(xiàn)異常情況下控制告警信號(hào)輸出。在移位時(shí)鐘的作用下,串行口發(fā)送緩沖器的數(shù)據(jù)一位一位地移入74LS164中。MR 清除端，為 0 時(shí)，輸出清零。并帶有清除端。 顯示電路顯示電路采用 8 位 LED 顯示電路對(duì)濕度值和溫度值進(jìn)行實(shí)時(shí)顯示。在本濕度檢測(cè)系統(tǒng)中，除了把一個(gè)獨(dú)立的按鍵用作開(kāi)始鍵外，利用了一種新型的鍵盤(pán)電路，它可以最大限度地減少鍵盤(pán)電路對(duì) I/O 端口的占用。AIE+UF周期性終端率和方波中斷率表列出了可通過(guò) RS 寄存器選擇的周期中斷的頻率和方波的頻率。DV0,DV1,DV2:這 3 位是用來(lái)開(kāi)關(guān)晶體振蕩器和復(fù)位分頻器。 當(dāng) UIP 位為 1 時(shí)，更新即將開(kāi)始，當(dāng)它為 0 時(shí)，表示在至少 內(nèi)芯片不會(huì)更新，此時(shí)時(shí)鐘，日歷和鬧鐘信息可以通過(guò)讀寫(xiě)相應(yīng)的字節(jié)獲得和設(shè)置。沒(méi)有中斷時(shí)，IRQ呈高阻狀態(tài)，其他中斷源還可以?huà)旖拥街袛嗫偩€(xiàn)上，由于 IRQ 是漏極輸出，所以需要外接上拉電阻。當(dāng) VCC 低于 時(shí)，DS12887 從內(nèi)部禁止對(duì)外部 CS 的操作，此時(shí)時(shí)鐘和 RAM 都被保護(hù)起來(lái)。DS：當(dāng)系統(tǒng)選擇的是 INTEL 總線(xiàn)模式時(shí)，DS 被稱(chēng)作 RD。三種可編程中斷 時(shí)間性中斷可產(chǎn)生每秒一次直到每天一次中斷 周期性中斷 122ms 到 500ms 時(shí)鐘更新結(jié)束中斷管腳說(shuō)明：SQW23IRQ19AD04AD15AD26AD37AD48AD59AD610AD711DS 17RCLR 21CS 13AS 14R/W 15NC 1NC 2NC 3NC 16NC 18NC 20NC 22DS12B887圖 DS12B887 引腳圖MOT(總線(xiàn)模式選擇): 當(dāng)此引腳接到 VCC 時(shí)，選用的是 MOTORALA 總線(xiàn)時(shí)序：當(dāng)它接到地或者不接時(shí)，選用的是 INTEL 總線(xiàn)時(shí)序。數(shù)據(jù)/地址總線(xiàn)復(fù)用用二進(jìn)制碼或 BCD 碼代表日歷和鬧鐘信息與 MC14681B 和 DS1287 的管腳兼容在掉電模式下,保存 RAM 的內(nèi)容并且凍結(jié)振蕩器,禁止所用其他芯片功能,直到下一個(gè)硬件復(fù)位為止。在芯片擦操作中,代碼陣列全被寫(xiě)“1”且在任何非空存儲(chǔ)字節(jié)被重復(fù)編程以前,該操作必須被執(zhí)行。石晶振蕩和陶瓷振蕩均可采用。XTAL1：反向振蕩放大器的輸入及內(nèi)部時(shí)鐘工作電路的輸入。/EA/VPP：當(dāng)/EA 保持低電平時(shí),則在此期間外部程序存儲(chǔ)器（0000HFFFFH）,不管是否有內(nèi)部程序存儲(chǔ)器。如果微處理器在外部執(zhí)行狀態(tài) ALE 禁止,置位無(wú)效。然而要注意的是：每當(dāng)用作外部數(shù)據(jù)存儲(chǔ)器時(shí),將跳過(guò)一個(gè) ALE 脈沖。ALE/PROG：當(dāng)