單片機(jī)原理畢業(yè)論文外文翻譯-wenkub
2022-12-05 04:47:59 本頁面
【正文】 and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a pany39。s 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a singlechip microputer system MCS51 series. Based on singlechip microputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16bit singlechip, but not ideal because the price has not been very widely used. After the 9039。s with the big consumer electronics product development, singlechip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32bit singlechip 16bit singlechip highend status, and enter the mainstream market. Traditional 8bit singlechip performance has been the rapid increase in processing power pared to the 8039。s entire line of products since it can perform many functions and developers will only have to learn this one platform. 2. The basic architecture consists of the following features: An eight bit ALU 32 descriptive I/O pins (4 groups of 8) which can be individually accessed Two 16 bit timer/counters Full duplex UART 6 interrupt sources with 2 priority levels 128 bytes of on board RAM Separate 64K byte address spaces for DATA and CODE memory One 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pendi ng interrupts. The time required for any 8051 instruction can be puted by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an clock, you can pute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle ( microseconds). 3. The SCM development trend Now can say single chip microputer as the period of the flowers, the world each big panies have launched their own SCM chip maki
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