基于cycloneⅲ系列ep3c25f324c8應(yīng)用quartusⅱ開發(fā)多功能數(shù)字鐘eda論文-wenkub
2023-07-03 14:15:08 本頁面
【正文】 能，則切換到設(shè)定鬧鈴的界面進(jìn)行鬧鈴時(shí)間的設(shè)定。為把結(jié)果顯示出來，考慮用動態(tài)顯示的技術(shù)實(shí)現(xiàn)LED管子的點(diǎn)亮。該系統(tǒng)所具有的功能如下u 能進(jìn)行正常的時(shí)、分、秒計(jì)時(shí)功能u 分別由六個(gè)數(shù)碼管顯示時(shí)分秒的計(jì)時(shí)u 系統(tǒng)就有保持，清零，校分，校時(shí)u 整點(diǎn)報(bào)時(shí)u 任意時(shí)間設(shè)置鬧鈴u 萬年歷功能下面給出系統(tǒng)的總體框圖 系統(tǒng)的工作原理該數(shù)字鐘系統(tǒng)的設(shè)計(jì)是借助于現(xiàn)有的SmartSOPC實(shí)驗(yàn)系統(tǒng)平臺進(jìn)行設(shè)計(jì)的，系統(tǒng)的時(shí)鐘是固定的48MHz,所以要進(jìn)行使用必須進(jìn)行系統(tǒng)的時(shí)鐘分頻的工作。并且本文還給出了在進(jìn)行設(shè)計(jì)的過程中容易犯的一些問題及指出了關(guān)于軟件及電路原理設(shè)計(jì)過程中的致命的細(xì)節(jié)問題，對以后的電路設(shè)計(jì)具有一定的指導(dǎo)意義。 南 京 理 工 大 學(xué)EDA設(shè)計(jì)論文作 者:學(xué) 號：學(xué)院(系):專 業(yè):題 目:基于CycloneⅢ系列EP3C25F324C8應(yīng)用QuartusⅡ開發(fā)多功能數(shù)字鐘指導(dǎo)者： (姓 名) (專業(yè)技術(shù)職務(wù))評閱者： (姓 名) (專業(yè)技術(shù)職務(wù))2010 年 5 月課程設(shè)計(jì)論文中文摘要本實(shí)驗(yàn)是基于基于CycloneⅢ系列EP3C25F324C8應(yīng)用利用QuartusⅡ軟件進(jìn)行多功能數(shù)字鐘的實(shí)現(xiàn)，結(jié)合硬件資源和軟件資源的分配關(guān)系，利用目前已經(jīng)掌握的知識設(shè)計(jì)了多功能的數(shù)字鐘，該數(shù)字鐘具有能進(jìn)行正常的時(shí)、分、秒計(jì)時(shí)功能，并且該系統(tǒng)具有計(jì)數(shù)保持功能，計(jì)數(shù)清零功能，系統(tǒng)的較分較時(shí)功能，整點(diǎn)報(bào)時(shí)功能，任意設(shè)定時(shí)間的鬧鐘功能，還有就是萬年歷功能。關(guān)鍵詞 多功能數(shù)字鐘 整點(diǎn)報(bào)時(shí) 鬧鐘 萬年歷課程設(shè)計(jì)論文外文摘要Title The Design Of Multifunction Digital Clock Based on Cyclone Ⅲ Series EP3C25F324C8 Using Quartus Ⅱ AbstractThe experiment is based on Cyclone Ⅲ Series EP3C25F324C8 using Quartus Ⅱ to design the multifunction digital clock, considering hardware and software resources provided. With the help of the knowledge I got, the designed multifunction digital clock has all of the functions of a digital clock, including the hours, minutes, seconds timer function, and the system can also be keeped and cleared at any time. Moreover, the hour and minute can be adjusted to any wanted time and can be set to alarm at any time if you want. Most of all, the calendar function is also designed. This paper is mainly concerned about the detailed design procedure beginning with the basic principle of the circuit works and the hardware schematic drawing, finally finishing the simulation and debugging using Quartus Ⅱ software in SmartSOPC experimental platform. In addition, the details that may otherwise be fatal to the system design is also given during the course of circuit design process, which actually has a certain significance in later design. Keywords Multifunction digital clock. Hourly chime function. Alarm at any time. Calendar目 錄1 引言 ………………………………………………………………………………12 系統(tǒng)的總體設(shè)計(jì) …………………………………………………………………1 系統(tǒng)總體功能 …………………………………………………………………1 系統(tǒng)的工作原理 ………………………………………………………………23 系統(tǒng)的詳細(xì)設(shè)計(jì) …………………………………………………………………3 總體模塊介紹 …………………………………………………………………3 各個(gè)子模塊的詳細(xì)設(shè)計(jì)…………………………………………………………3 48MHz的分頻模塊……………………………………………………………4 基本數(shù)字鐘計(jì)數(shù)模塊…………………………………………………………6 快速校分較時(shí)清零與保持模塊………………………………………………7 整點(diǎn)報(bào)時(shí)模塊……
環(huán)評公示相關(guān)推薦
鄂ICP備17016276號-1