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畢業(yè)設(shè)計(jì)-基于fpga的多路信號(hào)采集器設(shè)計(jì)(已修改)

2024-12-19 19:31 本頁(yè)面
 

【正文】 內(nèi)蒙古科技大學(xué) 本科生畢業(yè)設(shè)計(jì)說(shuō)明書(shū)(畢業(yè)論文) 題 目:基于 FPGA 的多路信號(hào) 采集器設(shè)計(jì) 學(xué)生姓名: 學(xué) 號(hào): 0605112306 專(zhuān) 業(yè):測(cè)控技術(shù)與儀器 班 級(jí):測(cè)控 20213 班 指導(dǎo)教師: 內(nèi)蒙古科技大學(xué)畢業(yè)設(shè)計(jì)說(shuō)明書(shū)(畢業(yè)論文) I 基于 FPGA 的多路信號(hào)采器設(shè)計(jì) 摘 要 信號(hào)采集器是信號(hào)和 和控制器之間樞紐,采集信號(hào)質(zhì)量的高 低,速度的快慢將嚴(yán)重影響到控制質(zhì)量。然而,自然中的信號(hào)各種各樣, 環(huán)境復(fù)雜 ,并且控制器對(duì)信號(hào)的要求亦各不相同,這些都使得信號(hào)采集一直以來(lái)都是技術(shù)難點(diǎn)。 本文試圖設(shè)計(jì)一種多 路的基于 FPGA 的信號(hào)采集器。與傳統(tǒng)的數(shù)據(jù)采集器 以 單片機(jī)或 DSP 作為控制器 相比 , FPGA 具有集成度高、邏輯實(shí)現(xiàn)能力強(qiáng)、速度快、設(shè)計(jì)靈活性好等眾多優(yōu)點(diǎn),尤其在并行信號(hào)處理能力方面比 DSP 更具優(yōu)勢(shì)。在信號(hào)處理領(lǐng)域,經(jīng)常需要對(duì)多路信號(hào)進(jìn)行采集和實(shí)時(shí)處理,這亦是本文的目標(biāo)。 本文首先介紹了信號(hào)采集技術(shù)的最新動(dòng)態(tài), 然后比較傳統(tǒng)的器件提出系統(tǒng)的總體方案設(shè)計(jì)。在硬件方面,介紹了傳感器、測(cè)量通道、 FPGA 芯片的結(jié)構(gòu)原理 和性能。數(shù)據(jù)處理的 軟件 設(shè)計(jì)以 QuartusⅡ?yàn)檐浖脚_(tái),采用 VHDL 作為編程語(yǔ)言 和 自頂向下的設(shè)計(jì)思想 。 本設(shè) 計(jì)大部功能通過(guò) 軟件仿真得到了 方案要求 的結(jié)果 ,其中數(shù)字通道在實(shí)際電路中得到了驗(yàn)證。 關(guān)鍵詞: 多路 信號(hào) 采集; FPGA; A/D 轉(zhuǎn)換; VHDL 內(nèi)蒙古科技大學(xué)畢業(yè)設(shè)計(jì)說(shuō)明書(shū)(畢業(yè)論文) II The Design of Mutichannel Signal Collector based on FPGA Abstract Signal acquisition is the hub between the signal and the controller, The quality of the signal collected and the speed will seriously affect the quality , there are various signal in nature, plex environment, and demanding control of the signal varies, All makes signal acquisition has been the technical difficulties. This paper attempts to design a multi、 FPGAbased signal acquisition device. With traditional data acquisition system to a microcontroller or DSP as a controller, FPGA has high integration, the strong ability to achieve logic,fast and good design flexibility and so on. Especially in the parallel signal processing advantages than the DSP. In signal processing, often require multiple signal acquisition and realtime processing, this is also the goal of this article First, this paper introduces the latest data acquisition technology, then make the device more traditional design of the overall system. In terms of hardware, introduced the principle and performance of the structure of sensor, measuring channel, FPGA chip. Data processing design for the software platform QuartusⅡ ,Use of VHDL as a programming language and topdown functions in the software simulation program requirements on the results obtained, digital channels in the actual circuit which has been verified. Key words: multichannel signal acquisition; FPGA; A/D converter; VHDL 內(nèi)蒙古科技大學(xué)畢業(yè)設(shè)計(jì)說(shuō)明書(shū)(畢業(yè)論文) III 目 錄 摘 要 ........................................................................................................................................... I Abstract.......................................................................................................................................II 目 錄 ........................................................................................................................................ III 第 1 章 引言 .............................................................................................................................. 1 系統(tǒng)設(shè)計(jì)背景 ............................................................................................................ 1 研究目的和意義 ............................................................................................ 1 國(guó)內(nèi)外研究現(xiàn)狀 ............................................................................................ 2 系統(tǒng)工作原理 ............................................................................................................ 3 課題任務(wù) .................................................................................................................... 3 論文安排 .................................................................................................................... 4 第 2 章 多路信號(hào)采集器的總體設(shè)計(jì) ...................................................................................... 5 系統(tǒng)總體方案 ............................................................................................................ 5 系統(tǒng)分析 ........................................................................................................ 5 理論知識(shí) ........................................................................................................ 6 系統(tǒng)結(jié)構(gòu)框圖 ............................................................................................................ 7 第 3 章 硬件設(shè)計(jì) ...................................................................................................................... 9 控制器 ........................................................................................................................ 9 FPGA 結(jié)構(gòu)原理 ............................................................................................... 9 Altera 公司的 FLEX10K .............................................................................. 10 傳感器 ...................................................................................................................... 11 傳感器的分類(lèi) .............................................................................................. 11 傳感器的選用原則 ...................................................................................... 12 傳感器選型 .................................................................................................. 14 測(cè)量通道 .................................................................................................................. 18 測(cè)量通道的選擇 .......................................................................................... 18 調(diào)理電路 ...................................................................................................... 19 多路模擬開(kāi)關(guān) ............................................................................................... 20 采樣保持器 .................................................................................................. 21 內(nèi)蒙古科技大學(xué)畢業(yè)設(shè)計(jì)說(shuō)明書(shū)(畢業(yè)論文) IV A/D 轉(zhuǎn)換模塊 ............................................................................................... 22 顯示模塊 ................................................................................................
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