【正文】 東華 理工大學(xué) I 基于 FPGA 設(shè)計(jì)的 CDMA 擴(kuò)頻通信同步技術(shù) 摘要 擴(kuò)頻通信技術(shù)因?yàn)榫哂休^強(qiáng)的抗干擾、抗噪聲、抗多徑衰落能力、較好的保密性、較強(qiáng)的多址能力和高精度測(cè)量等優(yōu)點(diǎn)，在軍事抗干擾和個(gè)人通信業(yè)務(wù)中得到了很大的發(fā)展。尤其是基于擴(kuò)頻理論的 CDMA 通信技術(shù)成為國(guó)際電聯(lián)規(guī)定的第三代移動(dòng)通信系統(tǒng)的主要標(biāo)準(zhǔn)化建議后，標(biāo)志著擴(kuò)頻通信技術(shù)在民用通信領(lǐng)域的應(yīng)用進(jìn)入了新階段。 近年來(lái)，隨著微電子技術(shù)和電子設(shè)計(jì)自動(dòng)化 (EDA)技術(shù)的迅速發(fā)展，以 FPGA 和 CPLD為代表的可編程邏輯器件借其設(shè)計(jì)方便靈活等特點(diǎn)廣泛應(yīng)用于數(shù)字信號(hào)處理領(lǐng)域。 本論文正是采用基于 FPGA 硬件平臺(tái)來(lái)實(shí)現(xiàn)了一個(gè)直接序列擴(kuò)頻通信基帶系統(tǒng)，該系統(tǒng)的實(shí)現(xiàn)涉及擴(kuò)頻通信和有關(guān) FPGA 的相關(guān)知識(shí)，以及實(shí)現(xiàn)這些模塊的 VHDL硬件描述語(yǔ)言和 Quartus II 開(kāi)發(fā)平臺(tái)，目標(biāo)是實(shí)現(xiàn)一個(gè)集成度高、靈活性強(qiáng)、并具有較強(qiáng)的數(shù)據(jù)處理能力的擴(kuò)頻通信基帶系統(tǒng)。 本論文中首先對(duì)擴(kuò)頻通信的基礎(chǔ)理論做了探討，著重對(duì)直序擴(kuò)頻的理論進(jìn)行了分析；其次根據(jù)理論分析，設(shè)計(jì)了全數(shù)字直接序列擴(kuò)頻基帶系統(tǒng)的結(jié)構(gòu)，完成了擴(kuò)頻序列的產(chǎn)生、信息碼的輸入和擴(kuò)頻。重點(diǎn)完成了對(duì)基帶擴(kuò)頻信號(hào)的相關(guān)解擴(kuò)和幾種同步捕獲電路的設(shè)計(jì)，將多種專(zhuān)用芯片的功能集成在一片大規(guī)模 FPGA 芯片上。在論文中列出了部分模塊的VHDL程序，并在 Quartus II 臺(tái)上完成各部分模塊的功能仿真。 關(guān)鍵詞：擴(kuò)頻通信； FPGA；同步捕獲 搜索文檔 ：基于 FPGA 實(shí)現(xiàn) CDMA 擴(kuò)頻通信中同步系統(tǒng) II FPGAbased design of CDMA spread spectrum munication synchronization Abstract Spread spectrum munication is widely developed in military anti． interference and personal munication because of its strong ability of anti—interference， anti—noise， anti multipath fading， multiaddressing and better security． Especially， when the CDMA munication technology based on spread spectrum bee the main standard suggestions of 3D mobile system regulated by ITU． Recently， with rapid developing of microelectronics and EDA， programmable logic devices represented by CPLD and FPGA have been greatly used in digital signal processing by their easy design． This paper realized the direct sequence spread spectrum munication baseband system based on the FPGA hardware platform． The realization of this system involved the spread spectrum munication and related FPGA knowledge， VHDL and the Quartus II ． And our aim is to realized a spread spectrum munication baseband system with high integrated strong flexibility and great data processing capability． First， the basic theory of spread spectrum has been discussed in this paper， especially the analysis of the direct sequence． Secondly， the system structure of the all digital direct sequence spread spectrum baseband system has been designed， finished the generating of the spread spectrum sequence， the input and spread spectrum of the information code． Mainly pleted relative de—spread spectrum towards the baseband spread spectrum signal and the design of several synchronized acqui sition circuit． Then these chips have been integrated on a largescale FPGA． Finally， partial VHDL program has been listed out， and the simulation of each module has been pleted by Quartus II ． Key Words： Spread Spectrum Communication； FPGA； Synchronization Acquisition 東華 理工大學(xué) III 目錄 第 1 章 緒論 .................................................................................................... 1 研究背景及意義 ..................................................................................................... 1 國(guó)內(nèi)外研究水平和發(fā)展趨勢(shì) .............................................................................. 2 ........................................................................................... 2 ........................................................................................... 2 擴(kuò)頻技術(shù)的研究現(xiàn)狀 ........................................................................................... 3 擴(kuò)頻技術(shù)的研究現(xiàn)狀 ................................................................................ 3 碼捕獲 ............................................................................................................ 3 .................................................................................................... 4 擴(kuò)頻技術(shù)的展望 .................................................................................................... 4 擴(kuò)頻技術(shù)的發(fā)展趨勢(shì) ................................................................................ 4 超寬帶技術(shù) ................................................................................................... 5 多載波調(diào)制技術(shù) .......................................................................................... 5 軟件無(wú)線電 ................................................................................................... 6 本論文的研究?jī)?nèi)容與結(jié)構(gòu) .................................................................................. 6 第 2 章 相關(guān)技術(shù)研究 ...................................................................................... 8 碼分多址（ CDMA）技術(shù)概述 ........................................................................ 8 碼分多址技術(shù)的概念 ................................................................................ 8 碼分多址技術(shù)基礎(chǔ)原理 ............................................................................ 8 擴(kuò)頻通信技術(shù) ........................................................................................................ 11 擴(kuò)頻通信的基本概念 ............................................................................... 11 搜索文檔 ：基于 FPGA 實(shí)現(xiàn) CDMA 擴(kuò)頻通信中同步系統(tǒng) IV 擴(kuò)頻通信的基本原理 ...............................................................................12 擴(kuò)頻通信的主要優(yōu)缺點(diǎn) ...........................................................................12 硬件描述語(yǔ)言和開(kāi)發(fā)平臺(tái) .................................................................................13 系統(tǒng)開(kāi)發(fā)語(yǔ)言 VHDL簡(jiǎn)介 .....................................................................13 Altera公司的 Quartus II .................................................14 FPGA設(shè)計(jì)流程 ...........................................................................................14 第 3 章 系統(tǒng)總體設(shè)計(jì)概述 ............................................................................ 16 系統(tǒng)總體設(shè)計(jì)思路 ...............................................................................................16 發(fā)送端的總體設(shè)計(jì) ...............................................................................................16 接受端的總體設(shè)計(jì) ...............................................................................................18 第 4 章 發(fā)送端的具體設(shè)計(jì)和實(shí)現(xiàn) ........................................