【正文】 2020 屆畢業(yè)生 畢業(yè)論文 題 目 : 基于 FPGA 的 數(shù)字相移信號發(fā)生器系統(tǒng)的設(shè)計 院系名稱： 信息科學(xué)與工程學(xué)院 專業(yè)班級： 電子信息科學(xué)與技術(shù) 06級１班 學(xué)生姓名： 郭亞峰 學(xué) 號： 20204360114 指導(dǎo)教師： 焦素敏 教師職稱： 副教授 2020 年 6 月 2 日 I 摘 要 在現(xiàn)代電子測量技術(shù)的研究及應(yīng)用領(lǐng)域中，常常需要高精度且相位可調(diào)的信號源。 數(shù)字相移信號發(fā)生器已成為現(xiàn)代測試領(lǐng)域應(yīng)用最為廣泛的通用儀器之一，代表了信號源的發(fā)展方向。 而隨著大規(guī)?？删幊踢壿嬈骷?FPGA 的發(fā)展以及可編程片上系統(tǒng) (SOPC)設(shè)計技術(shù)的日漸成熟，為這類信號發(fā)生器的設(shè)計與實現(xiàn)提供了理論依據(jù)與技術(shù)支持。 本文設(shè)計的數(shù)字相移信號發(fā)生器以直接數(shù)字頻率合成（ DDS）技術(shù)為核心，用現(xiàn)場可編程門陣列（ FPGA）來實現(xiàn)頻率和相位的預(yù)置和 改變 ，并完成信號的頻率和相位差顯示。設(shè)計中采用的 是 直接 數(shù)字頻率合成（ DDS）技術(shù)， 該技術(shù) 是一項關(guān)鍵的數(shù)字技術(shù)，能很好實現(xiàn)信號在幅度，頻率以及相位等方面的移動。系統(tǒng)以 EDA 軟件為工具，采用 VHDL 語言，滿足了 對信號相移 控制 更高要求。結(jié)果表明， 采用 EDA 技術(shù)設(shè)計的相移信號發(fā)生器使得數(shù)控系統(tǒng) 與 其他的 電路實現(xiàn)的相移信號發(fā)生器 相比具有更高的可靠性、實時性、運算速度 高以及 集成度 高等特點 。該相移信 號發(fā)生器的設(shè)計可像軟件一樣隨時更改，這就為系統(tǒng)地維護(hù)帶來了方便， 同時結(jié)合 FPGA 有效地擴(kuò)展輸出波形的頻率范圍，實現(xiàn)了輸出兩路高精度相位差的正弦信號，使該系統(tǒng)性能穩(wěn)定可靠。 關(guān)鍵 詞 ： 信號發(fā)生器 相移 DDS FPGA II Title The System of digital phase shift signal generator based on FPGA Design Abstract Signal sources with high accuracy and operational frequency are used in the fields of research and application of modern electronics measuring technology． Digital phase shift signal represent the development with it being one of the most widely measuring technology in the field. With the development of FPGA in a large scale and the maturing of SOPC， design technology have provided theoretical basis and technological support for the design and realization of such signal generators． This design of digital phase shift signal generator for FPGA as the core ,with the FPGA as to achieve the frequency ,phase, preset and step, and plete the signal frequency and phase display .AS used in the design of direct digital synthesis(DDS). Technology and effectively extends the use of FPGA output waveform of the frequency range to achieve the output of twoway highprecision phase of the sinusoidal signal, so that the system is stable and reliable. With EDA software for the system, using VHDL language, to meet the CNC system for machining higher demands. Experimental results show that the original part of the CNC system pared to the control circuit design using EDA technology makes the NC phase shift signal generator system with higher reliability, realtime, high operation speed and high integration. At the same time as EDA technology with insystem programmable FPGA chip features, so the shift key signal generator is designed to change the same as the software, which brings the system to facilitate maintenance. Combined with FPGA to extend effectively the frequency range of the output waveform to achieve the output of twoway highprecision phase of the sinusoidal signal, so III that the system is stable and reliable. Keywords: signal generators digital phase shift DDS FPGA IV 目 錄 摘 要 ............................................................................................................................I Abstract ........................................................................................................................ II 目 錄 .......................................................................................................................... IV 1 緒論 ........................................................................................................................... 1 課題背景 ............................................................................................................. 1 課題研究的目的和意義 .......................................................................................... 2 國內(nèi)外發(fā)展概況 ................................................................................................... 3 2 系統(tǒng)設(shè)計 方案的研究 ............................................................................................. 5 移相方案的比較與選擇 .................................................................................... 5 系統(tǒng)的總體方案 .................................................................................................. 7 DDS 基本原理 .................................................................................................. 8 DDS 基礎(chǔ)上數(shù)字相移信號發(fā)生器 .............................................................. 10 DDS 系統(tǒng)在 FPGA 上實現(xiàn) ................................................................................. 11 3 系統(tǒng)模塊設(shè)計 ........................................................................................................ 13 FPGA 設(shè)計的模塊劃分 ...................................................................................... 13 地址發(fā)生器的設(shè)計 ........................................................................................... 14 相位累加器的設(shè)計 ........................................................................................... 14 波形 ROM的設(shè)計 ............................................................................................... 17 4 系統(tǒng)外圍電路設(shè)計 .................................................................................................. 18 D/A 轉(zhuǎn)換電路的設(shè)計 ........................................................................................ 18 低通濾波器的設(shè)計 ............................................................................................ 19 V 系統(tǒng)時鐘的設(shè)計 ................................................................................................ 20 單片機控制部分的設(shè)計 ................................................................................... 21 5 系統(tǒng)模塊軟件設(shè)計 ............................................................................................... 24 軟件的開發(fā)環(huán)境 ................................................................................................ 24 5 .2 DDS 的源代碼及仿真波形 ............................................................................. 25 結(jié) 論 ..................................................................