【正文】 分類號(hào) 密級(jí) UDC 學(xué)號(hào) 3103036060 無線通信MIMO系統(tǒng)中糾錯(cuò)編碼的理論研究及其FPGA的實(shí)現(xiàn)學(xué)位申請(qǐng)人： 徐 莉 指導(dǎo)教師： 羅新民 副教授 學(xué)科專業(yè)： 通信與信息系統(tǒng) 學(xué)位類別： 工 學(xué) 2006年5月Theoretic Analyses on Errorcorrection Encoding Technology and Its Realization Based on FPGA for MIMO Wireless Communication SystemDissertation Submitted toXi’an Jiaotong UniversityIn partial fulfillment of the requirementFor the degree ofMaster of Engineering ScienceByXu Li(Communication and Information System)Dissertation Supervisor: Associate Professor Luo XinminMay，2006論文題目：無線通信MIMO系統(tǒng)中糾錯(cuò)編碼的理論研究及其FPGA的實(shí)現(xiàn)專 業(yè)：通信與信息系統(tǒng)碩 士 生：徐 莉指導(dǎo)教師：羅新民 副教授摘 要多輸入多輸出（Multiple Input Multiple Output，MIMO）系統(tǒng)在收發(fā)雙方采用多天線，并應(yīng)用空時(shí)編碼和正交頻分復(fù)用技術(shù)，在不增加系統(tǒng)帶寬的情況下成倍地提高了通信系統(tǒng)的容量和頻譜利用率，因此被認(rèn)為是第三代和未來移動(dòng)通信系統(tǒng)實(shí)現(xiàn)高速率傳輸、提高傳輸質(zhì)量的重要途徑。本文以建立無線MIMO系統(tǒng)的仿真軟件平臺(tái)為背景，圍繞基本通信模塊中信道編解碼部分展開研究。作為實(shí)驗(yàn)平臺(tái)，在實(shí)際中會(huì)根據(jù)不同的編碼方式、調(diào)制方式、信道模型組合分開多次進(jìn)行實(shí)驗(yàn)，因此在設(shè)計(jì)中信道編解碼部分采用多種糾錯(cuò)碼備選的方案。本課題對(duì)不同復(fù)雜度的幾種信道糾錯(cuò)碼進(jìn)行了仿真實(shí)驗(yàn)，并在此基礎(chǔ)上總結(jié)出各自的性能和特點(diǎn)。本論文主要包括以下幾個(gè)方面的工作：（1）較詳細(xì)地介紹了信道糾錯(cuò)編碼的基本原理，并對(duì)循環(huán)碼、卷積碼、級(jí)聯(lián)卷積碼等幾種有代表性的信道編碼進(jìn)行了較詳盡的理論分析和matlab仿真實(shí)驗(yàn)，總結(jié)出了各自的特點(diǎn)和抗噪性能；（2）在對(duì)卷積碼、Viterbi譯碼理論研究的基礎(chǔ)上，進(jìn)一步開展了對(duì)級(jí)聯(lián)卷積碼的性能分析，闡述了應(yīng)用級(jí)聯(lián)卷積碼的優(yōu)點(diǎn)，并給出了級(jí)聯(lián)卷積碼的設(shè)計(jì)準(zhǔn)則，為MIMO軟件平臺(tái)中的信道編碼模塊設(shè)計(jì)提供了理論依據(jù)；（3）根據(jù)卷積碼設(shè)計(jì)方案，在QuartusII開發(fā)環(huán)境下，用VHDL語言設(shè)計(jì)實(shí)現(xiàn)了卷積碼編、譯碼器，在傳統(tǒng)的設(shè)計(jì)基礎(chǔ)上優(yōu)化了路徑存儲(chǔ)管理單元，提高了譯碼速度，節(jié)約了存儲(chǔ)資源。本論文通過對(duì)幾種典型信道糾錯(cuò)碼的分析與研究，總結(jié)出了各自的抗噪性能與特點(diǎn)。尤其是對(duì)級(jí)聯(lián)卷積碼的深入研究，為MIMO軟件平臺(tái)的信道編碼模塊設(shè)計(jì)提供了一定的參考價(jià)值。對(duì)待定的碼字，如何尋找譯碼錯(cuò)誤概率小、譯碼速度快、譯碼設(shè)備簡單的算法，是糾錯(cuò)編碼技術(shù)中一個(gè)非常重要而又實(shí)際的問題，這也是本論文的主要任務(wù)之一，卷積碼的FPGA的實(shí)現(xiàn)就是基于此而進(jìn)行設(shè)計(jì)的，該設(shè)計(jì)通過了軟件仿真和驗(yàn)證，具有一定的實(shí)際應(yīng)用價(jià)值。【關(guān) 鍵 詞】多輸入多輸出系統(tǒng)、BCH碼、RS碼、卷積碼、SCCC、FPGA【論文類型】 應(yīng)用基礎(chǔ)Title: 　Theoretic Analyses on Errorcorrection Encoding Technology and Its Realization Based on FPGA for MIMO Wireless Communication SystemMajor: Communication and Information SystemName: Xu Li Supervisor: Associate Prof. Luo Xinmin AbstractMultiple Input Multiple Output (MIMO) system uses multiple antennas at both the transmitter and the receiver. It adopts many new technologies such as spacetime coding (STC) and Orthogonal Frequency Division Multiplexing (OFDM). It promotes system capacity and the efficiency of spectrum utilization while resulting in no bandwidth overhead. Therefore MIMO system is considered to be an important way to realize highspeed transmission and improve the quality of transmission in the third generation mobile munication systems and in the future applications as well. Based on the foundation of Multiple Input Multiple Output software simulation platform in wireless munication system, this paper mostly made some research on encoding and decoding method in basic munication module. As a software platform, practical tests will be made separately in different encoding methods, different modulation ways, and different channel conditions. Therefore, many kinds of errorcorrection codes can be tested in encoding and decoding channel. This paper carried on the simulation experiments with several different plexity channel codes, and researched their performances and characteristics.The content of this thesis can be summarized as follows: First, the errorcorrection encoding technology was introduced in detail, and several typical codes were analyzed theoretically in detail and simulated in the matlab environment, such as cyclic code, convolutional code, and SCCC. Through analysis and Comparison, their characteristics and antinoise performances were summarized. Second, based on the research of convolutional code and its Viterbi decoding method, a strong emphasis was laid on SCCC, advantages for it by contrast with Turbo code were illustrated, and the design criteria of SCCC were given. It made a theory design support for channel encoding of MIMO system. Third, in the QuartusII development environment, the encoder and decoder of the convolutional code were designed by using the VHDL language and some improvement, based on the traditional design, path memory management unit was improved. Thus, the speed of decoding was advanced, and the memory resource was saved.By the analyses and research on several typical channel codes, this paper summarized their antinoise performances and characteristics, especially the SCCC, which was more valuable for the implementation of the software platform of the MIMO system. It is a very important and practical problem that, for a given code, how to find a coding algorithm with less coding error, higher coding speed, and more simply coding device. Therefore, the implementation of the convolutional code in FPGA was designed, which was validated by simulation and has the value of application.Keywords: MIMO system, BCH code, RS code, Convolutional code, SCCC, FPGAType of Thesis: Applied Foundation目 錄第一章 緒論 1 課題背景及研究意義 1 信道編碼理論的發(fā)展 1 論文的主要研究內(nèi)容 3第二章 循環(huán)碼 4 BCH碼的定義及其有關(guān)性質(zhì) 4 BCH碼的編碼 5 系統(tǒng)形式的編碼 5 BCH（15,7,5）碼的編碼算法實(shí)現(xiàn) 6 BCH碼的譯碼算法實(shí)現(xiàn) 7 有限域的基本運(yùn)算 8 伴隨多項(xiàng)式的計(jì)算 8 錯(cuò)誤多項(xiàng)式的求取 9 錯(cuò)誤位置的求取 11 BCH（15,7,5）碼的譯碼流程圖 12 BCH碼的性能仿真 12 RS碼的定義以及有關(guān)性質(zhì) 14 RS碼的編碼與譯碼 15 RS碼的性能仿真 16 小結(jié) 17第三章 卷積碼 18 卷積編碼 18 維特比譯碼 21 Viterbi譯碼算法的基本原理 21 Viterbi譯碼算法 23 卷積碼的軟件仿真及其性能分析 25 Viterbi譯碼算法的步驟 25 卷積碼性能分析 25 小結(jié) 28第四章 級(jí)聯(lián)卷積碼 29 級(jí)聯(lián)卷積碼的發(fā)展歷史 29 SCCC編碼器的組成 30 SCCC的譯碼 31 SCCC譯碼器的組成 31 SISO算法 32 SISO算法的改進(jìn) 35 SCCC的性能仿真 38 成員編碼對(duì)SCCC的性能影響 38 迭代次數(shù)對(duì)SCCC的性能影響 43 交織深度對(duì)SCCC的性能影響 44 譯碼方式對(duì)SCCC的性能影響 45 小結(jié) 46第五章 卷積碼的FPGA實(shí)現(xiàn) 47 FPGA概述 47 FPGA的基本結(jié)構(gòu)與開發(fā)流程 47 Quartus II開發(fā)軟件 48 卷積碼設(shè)計(jì)方案 48 （2,1,3）卷積碼編碼器的實(shí)現(xiàn) 49 （2,1,3）卷積碼Viterbi譯碼器的實(shí)現(xiàn) 50 串/并變換 50 分支量度（BM）的計(jì)算與ACS 51 路徑量度存儲(chǔ)管理 54 最小值選擇與回朔 54 輸出譯碼比特 54 54第六章 總結(jié) 54 工作總結(jié) 54 研究展望 54致 謝 54參考文獻(xiàn) 54攻讀碩士學(xué)位期間發(fā)表的論文 54第一章 緒論第一章 緒論 課題背景及研究意義 多輸入多輸出（MIMO）技術(shù)是指在發(fā)射端和接收端分別使用多個(gè)發(fā)射天線和接收天線，信號(hào)通過發(fā)射端和接收端的多個(gè)天線傳送和接收，從而改善每個(gè)用戶的服務(wù)質(zhì)量（誤比特率或數(shù)據(jù)速率）。MIMO通過空時(shí)處理技術(shù)，充分利用空間資源，提高頻譜利用率，增加信道容量，它的出現(xiàn)打破了傳統(tǒng)的單入單出的通信系統(tǒng)局面，它是無線通信領(lǐng)域智能天線技術(shù)的重大突破。該技術(shù)能在不增加系統(tǒng)帶寬的情況下成倍的提高通信系統(tǒng)的容量和頻