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xx 大學(xué)學(xué)士學(xué)位論文 I 基于 Nios II 系統(tǒng)的 MP3 播放器的設(shè)計 摘要 近年來, 數(shù)碼產(chǎn)品更新?lián)Q代 的速度 很快,從當(dāng)初的分立元件到現(xiàn)在的集成芯片, 產(chǎn)品 體積越來越小,而所展現(xiàn)出來的功能則日益強大。它們 極大的豐富了 我們的日常生活。 SOPC( System on a programmable Chip,片 上可編程系統(tǒng) ) 是 Altera 公司提出的一種靈活、高效的 SOC 解決方案 ,它將處理器、存儲器、 I/O 口、 LVDS、CDR 等系統(tǒng)設(shè)計所需要的模塊集成到一個 PLD 器件上,具有可裁剪、可擴充、可升級,并具備軟硬件在系統(tǒng)可 編程等優(yōu)點。 本文提 出一種基于 Nios II 處理器的 MP3 播放器 的具體實現(xiàn)過程 , 系統(tǒng) 基于 Altera 公司的 DE2 開發(fā)平臺 進行設(shè)計 , 并 利用板上的 SD 卡 作為存儲設(shè)備,在 Nios II 處理器上實現(xiàn) MP3 的播放 、 TXT 文件的讀取以及 LCD 液晶顯示等功能。 硬件設(shè)計主要 利用 SOPC Builder,將處理器、存儲器和其它所需的外設(shè) IP核 添加進去 ,生成一個完整的自己定制的 Nios II 軟核 系統(tǒng)。 再結(jié)合 Quartus II中集成的 EDA 工具,將其下載到 FPGA 芯片中,獲得恰好滿足需求的定制 系統(tǒng)。 軟件設(shè)計在 Nios II 的 IDE 環(huán)境中進行, 用 C 語言編程實現(xiàn) SD 卡中存儲的MP3 和 TXT 文件的讀取,以及 LCD 顯示、 MP3 音樂的播放以及按鍵的控制。 整體設(shè)計對 SOPC 系統(tǒng) 軟硬件協(xié)同 的相關(guān)技術(shù)進行了初步研究。 軟硬件協(xié)同設(shè)計協(xié)調(diào)軟硬件開發(fā)過程并行開展,一方面可以縮短設(shè)計周期,極大地提高設(shè)計效率 ; 另一方面可以根據(jù)系統(tǒng)各個部分的特點和設(shè)計約束,選擇軟件或者硬件實現(xiàn)方式,得到高性能,低成本的優(yōu)化設(shè)計方案。 運用 SOPC 設(shè)計理念來設(shè)計數(shù)碼產(chǎn)品,能在較短的時間內(nèi)完成開發(fā)過程,還能滿足技術(shù)不斷更新?lián)Q代的需要。將當(dāng)前先進的 Nios 軟核技術(shù)應(yīng)用于電子電路設(shè)計當(dāng)中去 ,對于了解和掌握這種工具有重要的意義。 關(guān)鍵詞 SOPC(片上可編程系統(tǒng)) ; Nios II; MP3; 軟硬件協(xié)同設(shè)計 ; xx 大學(xué)學(xué)士學(xué)位論文 II Nios II System Based on the Design of MP3 Players Abstract In recent years, digital electronic products renew very fast. From the original discrete ponents to the current integrated chips, these products showing us with much powerful functions while decreasing their sizes. They provides us a great help for daily life. Sopc(System on a programmable Chip)is a flexible and efficient SOC solution proposed by Altera Corporation. It put modules that are necessary like processor,memory,input/output interface,LVDS and CDR together into a PLD device. As a result, the system can be cut、 expand、 upgraded at our will, hardware and software are programmable insystem at the same time. This paper presents a Nios II processorbased MP3 Players, the system is based on Altera39。s DE2 development platform using the SD card on the board as store equipment to achieve functions like MP3 playing,txt file reading and LCD displaying. Hardware design is pleted in Sopc Builder, Through adding the processor、memory and other IP cores of the peripherals to their own customized SOPC control system , generating a Nios II softcore systems of customized pletely. Combined with Quartus II EDA tools, we can precisely meet the demand of the customized system after download the core into the FPGA design of the software part was pleted in the Nios II IDE environment, and functions like reading the TXT and MP3 files stored in the SD card,LCD displaying,MP3 music playing and buttons controlling can be achieved. All of this can be programmed by C. This thesis Emphasize on the following key techniques in hardware/software codesign, it is the integration of specification, synthesis and simulation of hardware and software with unified design tools. By using hardware/software codesign, the design cycle can be shortened and design efficiency can be improved. On the other hand, designers can choose hardware or software implication method for system functions according the characteristic of function and the design constraints, in order to achieve high performance, low cost design. Through applying the SOPC design concept into the process of designing digital products, period of the development process can be shortened. Needs of the upgrading technology can be met at the same time. It39。s very important to apply the advanced NIOS softcore into electronic circuit design, which can help us to understand and master this kind of technology. Keywords SOPC( System on a Programmable Chip) 。 Nios II 。 MP3 。 Hardware/software Codesign xx 大學(xué)學(xué)士學(xué)位論文 III 目錄 摘要 ....................................................................................................................... I Abstract ................................................................................................................II 第 1 章 緒論 ........................................................................................................ 1 課題背景 ................................................................................................... 1 可編程片上系統(tǒng) ................................................................................ 1 軟硬件協(xié)同設(shè)計 ................................................................................ 2 嵌入式系統(tǒng) ........................................................................................ 2 MPEG Layer 3 .................................................................................... 3 國內(nèi)外文獻綜述 ....................................................................................... 4 論文研究內(nèi)容 ........................................................................................... 5 第 2 章 SOPC 技術(shù)及軟硬件協(xié)同方案 ............................................................. 6 FPGA 器件基本原理 ................................................................................. 6 Sopc 設(shè)計 技術(shù) ........................................................................................... 6 軟硬件協(xié)同技術(shù) ....................................................................................... 9 本章小結(jié) ................................................................................................. 10 第 3 章 MP3 播放器硬件系統(tǒng)設(shè)計方案 ......................................................... 11 MP3 原理 ................................................................................................. 11 MP3 播放器的系統(tǒng)需求 ......................................................................... 11 MP3 播放器的軟硬件劃分及組成模塊介紹 ......................................... 12 MP3 解碼硬件電路方案設(shè)計及實現(xiàn) .............................................. 12 I2C 總線協(xié)議及應(yīng)用 ........................................................................ 14 SD 卡簡介及 FAT16 文件系統(tǒng)構(gòu)成介紹 ........................................ 16 系統(tǒng)硬件結(jié)構(gòu)設(shè)計 ................................................................................. 21