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畢業(yè)設(shè)計(jì)中英文資料--基于ch372實(shí)現(xiàn)can總線適配器-文庫(kù)吧

2024-12-29 06:35 本頁(yè)面


【正文】 which could not only simplify the design of hardware circuit, but reduce the design of software program. The SCM AT89C51 mainly pletes the initialization work to CH37, responds the interrupt produced by CH372, and pletes the data transfer with puter. CH372 is a full speed USB interface chip, and it is patible with , and it supports plug and play, and its Surrounding electron ponents only include crystals and capacitances. CH372 has allpurpose local 8bits data bus and 4 lines control including read strobe, write strobe, chip selection input and interrupt output. The WR and RD of CH372 could respectively connect with WR and RD pins of SCM. CS connects with of SCM. The interrupt level outputted by INT is that the low level is effective, and it is connected to INT0 of SCM. A0 is the address line input, and it differentiates order and data port, internally installs weak pullup resistance, and when A0=1, it could write order, and when A0=1, it could read and write data. In the design, A0 connects with pin of SCM. So the I/O addresses on the write order port of CH372 could be defined as 0xBD00,and the I/O addresses on the read and write data port could be defined as 0xBC00. When WR is on high level and CS,RD and A0 are on low level, the data in CH372 output through D0D7, and when RD is on high level and CS, WR and A0 are on low level, the data are written in CH372 through D0D7, and when RD is on high level and CS and WR are on low level and A0 is on high level, the orders are written in CH372 through internally installs power supply POR, so it generally needs not reset from the exterior. CH372 needs 12MHz clock signal supplied by the exterior when it works normally. The clock signals are produced by the inverter internally installed in CH372 through crystal stabilized oscillator. The surrounding circuit only needs to connect a crystal with standard frequency of 12MHz between and XO, and the pin XI and pin XO respectively connect with a high frequency oscillator capacitance. CH372 supports 5V power supply voltage or power supply voltage. When it works on 5V voltage, VCC pin of CH372 inputs exterior 5V power supply, and the V3 pin should exteriorly connect with the decoupling capacitance of about . When it works on 3V voltage, V3 pin of CH372 should connect with VCC pin, and input exterior power supply, and the work voltage of other circuits connected with CH372 should not exceed . Hardware design of CAN munication module The hardware circuit of CAN bus munication module adopts CAN bus control chip SJA1000, bus driver PCA82C250 and highspeed photocouplers 6N137. The SCM AT89C51 pletes the initialization of SJA1000, and imp
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