【正文】 環(huán)緩沖區(qū)大小設(shè)置使用 SETUP 命令。輸入起始地址為保持固定在 SDRAM 的第一位置 ； 同樣，結(jié)果結(jié)束地址是保持固定在 SDRAM 的最后一個位置。使用 SETUP 命令，我們設(shè)置為輸入塊地址第一區(qū)的最后結(jié)果區(qū)域位置和啟動塊的地址。 一旦地址已設(shè)置，發(fā)出啟動命令來啟動運算引擎。的現(xiàn)狀，時間戳和標(biāo)記計數(shù)寄存器輪詢來控制應(yīng)用程序。狀態(tài)寄存器保存了 SDRAM的地址，應(yīng)用程序目前正在寫結(jié)果的軌道。時間戳寄存器指示當(dāng)前的時間戳計數(shù)器的值。該標(biāo)記計數(shù)寄存器指示當(dāng)前標(biāo)記計數(shù)器的值。 數(shù)據(jù)處理是停止發(fā)出停止命令。這樣，應(yīng)用程序處理數(shù)據(jù)，也沒有向 SDRAM寫入到啟動命令發(fā)出。 在一停止信號后給一開始信號將 重新啟動了數(shù)據(jù)采集和計算，并寫入結(jié)果和輸入數(shù)據(jù)到 SDRAM中。這些數(shù)據(jù)值被寫入由時間戳和標(biāo)志的設(shè)置 。 計數(shù)值提供的 SDRAM的起始地址，最后是結(jié)束命令和指示后， START 命令的時間間隔期間的數(shù)據(jù)是不處理。 平均功率和峰值功率計算值的所有四個通道都存儲在 SDRAM。平均數(shù)是存放在第一個 256 在接下來的 256 個地點的峰值之后的位置。平均功率存儲為一個 32位值。 32 位信息進行峰值功率值和相應(yīng)的塊索引，峰值已經(jīng)發(fā)生。 6 主機軟件并行地讀取從 SDRAM的結(jié)果，而在應(yīng)用程序運行。該軟件本身的同步通過查詢應(yīng)用程序狀態(tài)寄存器讀 出并執(zhí)行一個 DMA的結(jié)果。我們發(fā)現(xiàn)，當(dāng)一個并行的 DMA 是應(yīng)用程序，所以部分的輸入部分?jǐn)?shù)據(jù)覆蓋。通過與各 DMA的大小試驗，最佳的 4K 大小的 DMA獲得這不會導(dǎo)致數(shù)據(jù)丟失 看完了從 RC卡的結(jié)果，主機執(zhí)行的圖形繪制與眾多電源頻率數(shù)據(jù)分析。 6 研究結(jié)果及討論 我們的硬件模塊 輸入采樣器，緩沖器，信道分離功率計算，平均峰值 功率計算 ，和時間沖壓控制，都用 VHDL語言編寫，模擬使用 Xilinx 。所有的模塊設(shè)計進行了優(yōu)化，以 66 MHz運行。 256點復(fù)數(shù) FFT CoreGen Xilinx 的組件實例，并與其他模塊一起使用。在此應(yīng)用中，單 256 點復(fù)數(shù) FFT 的成分是用于模擬兩個并行實時 FFT 的塊。對于 256 點 FFT的 3個時鐘周期平均需要計算一個 FFT 的價值。因此我們的設(shè)計可以承受的輸入數(shù)據(jù)速率高達每通道22 兆赫。 我們還研究了此卡可重構(gòu)性，通過有選擇地放在獨立計算引擎位的文件的平均峰值功率電源或按用戶要求。 完整的 XCV800平均功率計算 FPGA上實現(xiàn)了利用大約 80%的片段 ,92%的 RAM。 與峰值功率計算中的利用為大約 83％的片段和 92％的 RAM 人們可以很容易 的將端口超過 8 個內(nèi)核和多個電源的 FFT 計算單元的可能性在 Xilinx 的 Virtex 2Pro或 Virtex4器件的應(yīng)用，增強許多倍的性能。在這里，我們將有一個內(nèi)置的 LVDS信號有額外的優(yōu)勢 7 結(jié)論 在本文中，我們提出了使用干擾功率譜分析檢測的可重構(gòu)計算的新應(yīng)用。它使用 Xilinx的 FFT 核內(nèi)部開發(fā)的模塊。該應(yīng)用程序也可以進行重新配置以計算平均功率或峰值功率。 7 High Performance Power Spectrum Analysis Using a FPGA Based Recon?gurable Computing Platform Abstract Powerspectrum analysis is an important tool providing critical information about a signal. The range of applica tions includes municationsystems to DNAsequencing. If there is interference present on a transmitted signal, it could be due to a natural cause or superimposed forcefully. In the latter case, its early detection and analysis bees important. In such situations having a small observation window, a quick look at powerspectrum can reveal a great deal of information, including frequency and source of in terference. In this paper, we present our design of a FPGA based recon?gurable platform for high performance power spectrum analysis. This allows for the realtime data acquisition and processing of samples of the ining sig nal in a small time frame. The processing consists of putation of power, its average and peak, over a set of input values. This platform sustains simultaneous data streams on each of the four input channels. 1. Introduction The concept and use of power spectrum of a signal is fundamental in engineering in munication systems, microwave and radars. Recently, it is also being used in diverse applications such as gene identi?cation. In a typ ical transmitreceive system, if the received signal is pure and as expected, no ?ltering is required. However, on the otherhand, any interference overriding the received signal may require certain analysis in order to know more about the interference. As the interference tends to pump addi tional power in the received waves, the power bees a useful criterion for such an analysis. Using the reverse engineering techniques, the excess power information with the ining signal may help in ?nding the characteristics of the interface such as frequency, source etc. A power spectrum [5] is a representation of the magni tude of the various frequency ponents of a signal. By looking at the spectrum, one can ?nd how much energy or power is contained in the frequency ponents of the sig nal. Analysis or evaluation of the power spectrum is one of the ways of isolating noise. There are a couple of techniques for generating the power spectrum. The most mon one is by using the Fourier transform [6]. The other techniques such as the wavelet transform or the maximum entropy method can also be used. Experimentally, power spectrum can be determined in three ways: (1) Using a spectrum or signal analyzer a mercial instrument [2] dedicated for displaying the real time power spectra (2) Using a microputer based add on signal analyzer card, or (3) by digitizing experimental data and performing a Fast Fourier Transform (FFT) on a desktop machine. 8 In terms of cost and plexity, the abovementioned three options are in the descending order, while considering the ?exibility, they are in the ascending order. Dedicated analyzers are some times used, however they may not be cost effective, ?exible or petent enough, to extract the interference related information when the observation win dow is short. In general, the second option provides additional ?exi bility, especially when the Field Programmable Gate Array (FPGA) is used. In this paper we present our design of a very powerful recon?gurable puting based design for solving plex signal functions and realtime