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法。一般按每1 s說3個字計算,60 s可說180個字,再根據(jù)ISD2560的地址分辨率為100 ms,即可計算出語音段所需的地址單元數(shù)。錄音源程序: 致 謝在兩個多月的課題研究及論文撰寫過程中,我非常感謝我的導(dǎo)師—張冀祥老師。在畢業(yè)設(shè)計的這段時間中,李老師不僅使我在學(xué)業(yè)上有了很大的提高,而且言傳身教,使我學(xué)到了作為一名大學(xué)生所應(yīng)具備的那種踏實勤懇、一絲不茍、認(rèn)真求實的優(yōu)良品質(zhì)和學(xué)習(xí)作風(fēng)。衷心地謝謝您,張老師!同時,我還要感謝電子實驗室的楊旭楊老師,無論是從資料上,還是從經(jīng)驗和技術(shù)上都提供了極大的幫助。最后,對所有在這三年年里的學(xué)習(xí)和生活中,給予我各種關(guān)心我?guī)椭娜藗?,我僅表達我最衷心的謝意!謝謝你們!參 考 文 獻1 余永權(quán). ATMEL89系列單片機應(yīng)用技術(shù)[M]. 北京:北京航空航天大學(xué)出版社.2 2002 數(shù)碼語音芯片、產(chǎn)品及應(yīng)用電路資料匯編[M]. 3 劉欣,等. IDS語音器件分段地址的獲取[J]. 電子技術(shù)應(yīng)用,1999(10)4 5 《MCS51單片機接口技術(shù)與運用》李華 北京航天航空大學(xué)出版社6 《單片機接口技術(shù)與運用》胡漢才 清華大學(xué)出版社7 周航慈. 單片機應(yīng)用程序設(shè)計技術(shù)(修訂版)[M]. 北京:北京:北京航空航天大學(xué)出版社,8 《單片微型機原理`應(yīng)用與實驗,第三版》張友德 等編 復(fù)旦大學(xué)出版社AT89C52資料:Features 8 Kbytes of InSystem Reprogrammable Flash MemoryEndurance: 1,000 Write/Erase Cycles ThreeLevel Program Memory Lock 32 Programmable I/O Lines Eight Interrupt Sources Low Power Idle and Power Down ModesDescriptionThe AT89C52 is a lowpower, highperformance CMOS 8bit microputer with 8 Kbytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high density nonvolatile memory technology and is patible with the industry standard 80C51 and 80C52 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a powerful microputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89C52 provides the following standard features: 8 Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16bit timer/counters, a sixvector twolevel interrupt architecture, a full duplex serial port, onchip oscillator, and clock circuitry. In addition, the AT89C52 isDescription (Continued)designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset.Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition, and can be configured to be the timer/counter 2 external count input () and the timer/counter 2 trigger input (), respectively, as shown in the following table.Port 1 also receives the loworder address bytes during Flashprogramming and program verification.port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some controlsignals during Flash programming and verification.Port 3Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source cu