【正文】 [8] 求是科技 李現(xiàn)勇 VisualC 串口通信技術(shù)與工程實踐 第二版 人民郵電出版社 2020 年 [9] 范逸之 陳立元 VisualBas ic 與 RS232 串行通信控制 北京 清華大學(xué)出版社 2020 年 13355105 [10] 楊剛 周群 電子系統(tǒng)設(shè)計與實踐 電子工業(yè)出版社 2020 年 [11] 許會楊榮輝使用 PCOMM 完成微機與單片機高速數(shù)據(jù)傳輸及數(shù)據(jù)實時顯示 儀表技術(shù)與傳感器 2020 年 4 2628 [12] 木林森 高峰霞 羅麗瓊 奚紅宇 Visual C60 使用與開發(fā) 北京清華大學(xué)出版社 1998 年 [13] 丁展 劉海英 VisualC 網(wǎng)絡(luò)通信編程實用案例精選 人民郵電出版社 2020 年 [14] 賈廣雷 劉培玉 多線程技術(shù)及其在串口通信中的應(yīng)用 計算機工程 202029 1 247249 [15] 呂松茂 韓震宇 用 PComm 處理 Windows 環(huán)境下的串口通信 計算機工程 202027 6 176179 [16] 用 PComm 開發(fā) PC 機與單片機的通信程序 [17] Kate Gregory Visual C6 開發(fā)使用手冊 北京 機械工業(yè)出版社 1999年 [18] Richard CLernecker Tom Archer Visual C6 寶典 電子工業(yè)出版社 2020 年 [19] 許福 舒志 張威 Visual C 程序設(shè)計技巧與實例 中國鐵道出版社 2020 年 [20]張 博陳永冰 基于 PComm 的串口通信實現(xiàn) 微計算機信息 202022 21 707199 在進行該串口通信程序設(shè)計的時候我的指導(dǎo)老師給予了很大的幫助介紹了很多很有參考價值的資料實驗室的老師也給予了很多幫助在此均表示感謝 英文引用原文及譯文 Development of a Universal Networked Timer at NSTX A new Timing and Synchronization System ponent the Universal Networked Timer UNT is under development at the National Spherical Torus Experiment NSTX The UNT is a second generation multifunction timing device that emulates the timing functionality and electrical interfaces originally provided by various CAMAC modules Using Field Programmable Gate Array FPGA technology each of the UNTs eight channels can be dynamically programmed to emulate a specific CAMAC module type The timer is patible with the existing NSTX timing and synchronization system but will also support a future clock system with extended performance To assist system designers and collaborators software will be written to integrate the UNT with EPICS MDSplus and LabVIEW This paper will describe the timing capabilities hardware design programmingsoftware support and the current status of the Universal Networked Timer at NSTX I INTRODUCTION An essential facility for NSTX research is the central timing and synchronization system which is used to synchronize control and data acquisition systems throughout the NSTX experimental plex Most of the timing system is constructed using 25 year old CAMAC technology which presents maintenance and performance problems Over the past few years NSTX has been developing a new core timing ponent based upon an FPGA The first generation device was called the Multifunction Timing System MTS which has been successfully deployed on several NSTX subsystems This report will describe the salient features of the UNT including a description of the hardware and software the current status and future plans II REVIEW OF THE MTS The MTS was designed to emulate a variety of practical timing functions and electrical interfaces that in the past were provided by several types of CAMAC modules The device had six channels each of which could be dynamically programmed to perform the desired timing function There were a variety of ways the user could program the timing channels a Windows DLL a VisualC GUI LabVIEW and MDSPlus or EPICS via LabVIEW The MTS PCIboard was typically installed in a rackmount PC along with other data acquisition boards forming a PCbased control and data acquisition system Work performed under the auspices of the US Department of Energy by Princeton Plasma Physics Laboratory under Contract No DEAC0276CH03073 A Timing Functions Reference contains a more thorough description of the timing functions and performance capabilities of the MTS These are the main features of the UNT 1 Eight channel device 2 Timing functions include eventdecoding delay triggers gates clocks pulse counting Timing functions triggered by software or external signals 3 100 nS timing resolution 4 256 event codes on link 5 Supports 1 MHz and 10 MHz linkcarrier B Enhanced Clock Capabilities The MTS is patible with the existing NSTX clock system but it will also support an enhanced future clock system The additional capabilities include 1 A base carrier frequency upgrade from 1 MHz to 10 MHz 2 100 nanosecond timing resolution rather than up to 1 millisecond 3 Fiber optic Facility Clock ports 4 Additional event decoding from 16 events to 256 III UNT SYSTEM DESIGN One of the shortings of the MTS was its packaging It required a puter with a PCI bus slot and a cable to attach to the external isolationcircuit board Although the PCI bus is currently the most popular it is already diminishing in lieu of PCI busses with extended performance The MTS PCIbus requirement was a hindrance in interfacing nonPCI control system technologies such as PLC VME CompactPCI PC104 and PCIX This presents a problem for NSTX researchers and collaborators who often bring modern and unique systems for integration onto NSTX A primary design criterion for the next generation timing device was to imize the products versatility and longevity Experience has shown that over the lifetime of a fusion device hardware and software technologies evolve through several generations Things that were popular and easily supported at the beginning of the research project bee costly and difficult to maintain in the projects latter years Industry standards and open software will be used to minimize these lifecycle issues The UNT is based upon two of the most enduring international standards Physically the device is pliant with the IEC 60297 standard 19 rackmount equipment Communications for programming and configuring the timing channels employ the IEEE 802 standards Ether In addition the worlds leading industrial Ether protocol Modbus TCPIP will be used Most puters operating systems and programming and scripting languages can access the work These aforementioned attributes will lengthen the useful lifetime of the UNT A Improvements upon MTS 1 The system has been repackaged o no longer dependent on PCI bus technology o eli