開(kāi)關(guān)電源設(shè)計(jì)外文翻譯-其他專業(yè)-在線瀏覽
2025-03-24 11:19本頁(yè)面
【正文】 tion ), a small capacitor Cb is fitted in series with the primary as in Figure . Recall that flux imbalance occurs if the voltsecond product across the primary while the core is set (moves in one direction along the hysteresis loop) differs from the voltsecond product after it moves in the opposite direction. Thus, if the junction of C1 and C2 is not at exactly half the supply voltage, the voltage across the primary when Q1 is “on” will differ from the voltage across it when Q2 is “on” and the core will walk up or down the hysteresis loop, eventually causing saturation and destroying the transistors. This saturating effect es about because there is an effective DC current bias in the primary. To avoid this DC bias, the blocking capacitor is placed in series in the primary. The capacitor value is selected FIGURE The small blocking capacitor Cb in series with the halfbridge primary (Figure ) is needed to prevent flux imbalance if the junction of the filter capacitors is not at exactly the midpoint of the supply voltage. Primary current charges the capacitor, causing a droop in the primary voltage waveform. This droop should be kept to no more than 10%. (The droop in primary voltage, due to the offset charging of the blocking capacitor, is shown as dV.) as follows. The capacitor charges up as the primary current Ipft flows into it, robbing voltage from the flattopped primary pulse shown in Figure . This DC offset robs voltseconds from all secondary windings and forces a longer “on” time to achieve the desired output voltage. In general, it is desirable to keep the primary voltage pulses as flattopped as possible. In this example, we will assume a permissible droop of dV. The equivalent flattopped current pulse that causes this droop is Ipft in Eq. . Then, because that current flows for , the required capacitor magnitude is simply Cb = () Consider an example assuming a 150W half bridge operating at 100 kHz from a nominal DC input of 320 V. At 15% low line, the DC input is 272 V and the primary voltage is 177。《功率因數(shù)校正開(kāi)關(guān)電源的研究與設(shè)計(jì)》外文翻譯 Switching Power Supply Design(開(kāi)關(guān)電源設(shè)計(jì) ) CHAPTER 3 Half and FullBridge Converter Topologies Introduction Halfbridge and fullbridge topologies stress their transistors to a voltage equal to the DC input voltage not to twice this value, as do the pushpull, singleended, and interleaved forward converter to pologies. Thus the bridge topologies are used mainly in offline converters where supply voltage would be more than the switching transistors could safely tolerate. Bridge topologies are almost always used where the normal AC input voltage is 220 V or higher, and frequently even for 120V AC inputs. An additional valuable feature of the bridge topologies is that primary leakage inductance spikes (Figures and ) are easily clamped to the DC supply bus and the energy stored in the leakage inductance is returned to the input instead of having to be dissipated in a resistive snub ber element. HalfBridge Converter Topology Basic Operation Halfbridge c
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