【正文】 the preparation of the foregoing order by Mnemonic MOV A, 20H, understanding the code into the machine 74H, 20H: (written in binary is 01110100B and 00100000B). Deal with problems in the singlechip will be required before good procedures, tables, constants piled into machine code into the microcontroller memory, the memory as the program memory. Program memory can be put on the chip or chip, chipchip can also be set at the same time. As the PC program counter for 16bit, the program memory 16bit binary address can be used, therefore, the largest internal and external memory addresses from 0000H to FFFFH. 8051 there are 4k bytes of ROM, on the occupied by the 0000H ~ 0FFFH minimum 4k bytes, this chip to expand the program memory address 1000H numbers should be started, if you use 8051 as a 8031, do not want to use chip 4kROM , all bychip memory, the address number can be started by the 0000H. However, this should be the first 8051 feet (31) (that is, EA feet) remain low. When EA is high, the user 0FFFH in the range of 0000H to use the internal ROM, more than 0FFFH, the singlechip CPU access to external program memory automatically. Second, data storage Singlechip data memory RAM memory by reading and writing ponents. Its maximum capacity can be expanded to 64k, used to store realtime data input. 8051 there are 256 units of the internal data memory, in which 00H ~ 7FH for internal random access memory RAM, 80H ~ FFH register for the special zone. Actual use should be the first full use of internal memory, from the use of perspective, to understand the structure of internal data memory and address of the distribution is very important. Because the future directions in the study design of systems and procedures they will be frequently used. 8051 internal data memory address 00H to FFH by a total of 256 bytes of address space, the space was divided into two parts, of which the internal data RAM address 00H ~ 7FH (that is, 0 ~ 127). The Special Function Registers used as the address of 80H ~ FFH. 256 bytes in this also opened up a socalled digital address area, the region can not only byte addressing, but also by the bit (bit) addressable. For those who require databit operation can be stored to the region. From 00H to 1FH arranged the work of four groups of registers, each occupied by 8byte RAM, recorded as R0 ~ R7. Whether the choice of which set of registers, register by the aforementioned signs of RS1 and RS0 to choose. Add in the two different binary number, you can choose different groups of registers, as shown in Schedule 1. Third, special function register Special Function Register (SFR) address the range of 80H ~ FFH. In the MCS51, in addition to program counter register PC and four work areas, and the remaining 21 special function register SFR in this block. Of which five are doublebyte register, which takes up a total of 26 bytes. The special function registers and address of the symbols see Table 2. Which can be with * bit addressable. Special Function Registers 8051 reflects the state of the state of 8051 is actually the word and control word register. CPU PSW is typical for a case. Special Function Registers in general these two categories, with the pin on the chip, and the other for chip control function. With the chip on the pin is the Special Function Registers P0 ~ P3, they are in fact four of eight latches (one for each I / O port A), each additional latch corresponding output driver and input buffer constitutes a parallel port. MCS51 a total of four such P0 ~ P3 the parallel port provides 32 I / O lines, each line is a twoway, and has the second largest function. The rest used for chip control register, the accumulator A, marks register PSW, the data pointer DPTR function mentioned before, while others function registers part of the back of the further introduction Singlechip instruction and addressing mode To the normal operation of singlechip, to be programmed in advance, and then the procedure Add memory, and then from the CPU to implement the program. Procedure is posed by the directive, Directive is an essential ponent of th