【正文】 processing unit, for example. The continuous decrease in the semiconductor dimensions and in electrical features, leads to an increasing sensitivity to some effects of the environment (ionization due to radiation, magic perturbations, thermal,...) considered minor or negligible in the technologies of the past. Particularly, digital circuits operating in space are subject to different kinds of radiation. However, some problems have also been reported for some Earth applications, like avionics systems . Radiation effects can be permanent or transient . Permanent faults result from particles trapped at the silicon/oxide interfaces and appear only after long exposure to radiation (Total Ionization Dose). Transient faults (Single Event Effects, SEE) may be 武漢紡織大學(xué) 2020 屆畢業(yè)設(shè)計(jì)論文 33 caused by the impact of a single charged particle in sensitive zones of the circuit. Depending on the impact location, two kind of SEEs are distinguished: SELs (Single Event Latchups) and SEUs (Single Event Upsets). SELs result from the triggering of parasitic thyristors (present in CMOS technologies) and provoke short circuits, capable to damage the ponent by thermal effect if the circuit is not poweredoff at time. SEUs are responsible for transient changes, called upsets or bit flips, in bits of information stored within an integrated circuit. Total ionization dose (TID) and single event latchup (SEL) effects can be reduced to acceptable levels using some of the existing CMOS technologies, for example the Epibulk CMOS process . However, Single Event Upsets (SEUs) represent radiation induced hazards, which are more difficult to avoid in the space applications, especially in highdensity submicron integrated circuits. In this paper, only SEU faults are being considered. The consequences of a SEU fault depend on the nature of the perturbed information, ranging from erroneous results to system crashes. For plex circuits like DSP processors, coprocessors, microcontrollers, the sensitivity to SEU correlates strongly with the amount of internal memory (registers, memory bits, flipflops, etc.) available. In this context, it is clear the need for circuits immune to radiation effects, mainly those working in space, where a fault can imply the lost of millions of dollars and years of work. Moreover, it is extremely important to know the efficiency of a faulttolerant technique before the circuit is in its real environment. This paper aims at investigating the efficiency of a fast prototyping design hardening technique, which focuses on generalpurpose processor architectures. The proposed technique is mainly based on the inclusion of error detecting and correcting capabilities. A reduced instruction set version of a wellknown microcontroller, the 8051 from Intel, was chosen as the test vehicle for these researches. This choice was motivated by the fact that this microcontroller is widely used in space applications. The paper is anized as follows: in Section 2 some related works are revisited. In Section 3 the effects of transient faults in a microcontroller are presented along with a tool capable to emulate the real process of a SEU fault occurrence. The implementation of a hardened 8051 microcontroller is presented in Section 4. Experimental results, concerning both the performance in terms of area overhead and operating frequency, and the sensitivity to transient bit flips, are summarized in 武漢紡織大學(xué) 2020 屆畢業(yè)設(shè)計(jì)論文 34 Section 5. Section 6 brings some considerations about the implementation of a prototype of the faulttolerant circuit to be tested in a real radiation environment. Concluding remarks and future work are discussed in Section 7. 2. Related Work Solutions to implement a fault tolerant device with respect to transient faults can be considered at different steps of the device development process. The mitigation solution can be divided in: circuit level, where a specific technology process for fabrication is used。在此，我要對(duì)要求我們做這次課程設(shè)計(jì)的余老師致以衷心的感謝，因?yàn)橛嗬蠋熃o了我一次難得的鍛煉的機(jī)會(huì)。到要做課程設(shè)計(jì)的時(shí)候，發(fā)現(xiàn)依然學(xué)到用時(shí)方恨少，到圖書(shū)館里借書(shū)，上網(wǎng)查資料，費(fèi)了不少勁才完成這次課程設(shè)計(jì)，雖然做的蠻吃力的，但通過(guò)這次課程設(shè)計(jì)我比較好的對(duì)指令系統(tǒng)，內(nèi)部資源和人機(jī)交互的知識(shí)大體復(fù)習(xí)了一遍，發(fā)現(xiàn)了不少缺漏，很好的補(bǔ) 缺補(bǔ)漏了一遍。當(dāng)我第一次在試驗(yàn)儀上成功的調(diào)試出三角波的程序，看到示波器上的三角波圖形，突然覺(jué)得單片機(jī)也是蠻有意思的，那種感覺(jué)就像第一次用 CFREE 第一次在計(jì)算機(jī)上編寫(xiě)出第一個(gè)“ Hello world”程序一樣。后來(lái)有一段時(shí)間，我在課余的時(shí)間去旁聽(tīng)了幾堂韓建民老師的《計(jì)算機(jī)組成原理》，對(duì)計(jì)算機(jī)的指令系統(tǒng)和尋址方式有了點(diǎn)認(rèn)識(shí)，再回過(guò)頭來(lái)看單片機(jī)的指令系統(tǒng)的時(shí)候覺(jué)得慢慢的有頭緒了，不再像原先那樣摸不著頭腦。雖然每次課都看著大屏幕，聽(tīng)著老師講課，但還是覺(jué)得整門(mén)課聽(tīng)的比較吃力。因此，最初對(duì)于這門(mén)課并沒(méi)有多少興趣。起初，我也屬于一個(gè)比較“怕硬”的計(jì)算機(jī)學(xué)生，由于大一大二的數(shù)電模電沒(méi)學(xué)好，所以一提到硬件方面的東 西，我就覺(jué)得頭疼。 DW 0000H 。 DW 1D02H,2502H,2502H,2402H,2206H,2902H 。 DW 2902H,2E02H,2E02H,2C02H,2906H,2702H 。 DW 2E02H,2E02H,2E02H,2E02H,2E06H,2C02H 。=== 預(yù)存歌曲表 === TABLE2: DW 2202H,2902H,2902H,2902H,2906H,2702H 。==== 音符參數(shù)表 === TABLE: DB 3FH,06H,5BH,4FH,66H,6DH,7DH,07H DB 7FH,6FH,77H,7CH,39H,5EH,79H,71H 計(jì)數(shù)器初值表 。==== 10ms 延時(shí)子程序 === DELY10MS: MOV R6,10 D1: MOV R7,248 DJNZ R7,$ DJNZ R6,D1 RET 中斷服務(wù)子程序 。=== 1/8 拍周期表 === S_PARA: DS 1DH DB 15H,16H,00 武漢紡織大學(xué) 2020 屆畢業(yè)設(shè)計(jì)論文 22 DB 19H,00H,1CH,00H,1FH,21H,00H,25H DB 00H,29H,2CH,00H,31H,34H,37H,00H DB 3EH,41H,00H,49H,00H,52H,57H,00H DB 62H 延時(shí)參數(shù)表 。=== 延時(shí)子程序 === SDELAY: MOV A,R4 。 查表取出 1/8拍周期數(shù) ,保存到 R5 MOV DPTR,S_PARA MOVC A,A+DPTR MOV R5,A NEXTCYC: 武漢紡織大學(xué) 2020 屆畢業(yè)設(shè)計(jì)論文 21 ACALL SOUND DJNZ R5,NEXTCYC RET 發(fā)音子程序 。=== 產(chǎn)生 1/8 拍延時(shí)子程序 === EIGHTH: MOV A,R7 。=== 歌曲播放子程序 === SONG: MOV A,R2 。送入低字節(jié) 武漢紡織大學(xué) 2020 屆畢業(yè)設(shè)計(jì)論文 14 MOV TL0,A SETB TR0 DK1A:MOV A,P2 。Table1 以字保存，所以散轉(zhuǎn) MUL AB MOV TEMP,A MOV DPTR,TABLE1 MOVC A,A+DPTR MOV STH0,A 。保存列號(hào) LJMP DK1 NK1:CJNE A,0DH,NK2 MOV KEYBUF,1 LJMP DK1 NK2:CJNE A,0BH,NK3 MOV KEYBUF,2 LJMP DK1 NK3:CJNE A,07H,NK4