plc外文翻譯3-plc設計-展示頁
2025-01-31 06:46本頁面
【正文】 lt of logic operation (RLO) = 0. When used in series, | | is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic. Status word BR CC1 CC0 OV OS OR STA RLO /FC writes: x x x 1 Example Power flows if one of the following conditions exists: The signal state is 1 at inputs and Or the signal state is 1 at input . Xx 交通大學畢業(yè)設計（論文） | / | Normally Closed Contact (Address) Symbol address | / | Parameter Data Type Memory Area Description address BOOL I, Q, M, L, D, T, C Checked bit Description | / | (Normally Closed Contact) is closed when the bit value stored at the specified address is equal to 0. When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = 1. Otherwise, if the signal state at the specified address is 1, the contact is opened. When the contact is opened, power does not flow across the contact and the result of logic operation (RLO) = 0. When used in series, | / | is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic. Status word BR CC1 CC0 OV OS OR STA RLO /FC writes: x x x 1 Example Power flows if one of the following conditions exists: The signal state is 1 at inputs and Or the signal state is 1 at input XOR Bit Exclusive OR Xx 交通大學畢業(yè)設計（論文） For the XOR function, a work of normally open and normally closed contacts must be created as shown below. Symbols Parameter Data Type Memory Area Description address1 BOOL I, Q, M, L, D, T, C Scanned bit address2 BOOL I, Q, M, L, D, T, C Scanned bit Description XOR (Bit Exclusive OR) creates an RLO of 1 if the signal state of the two specified bits is different. Example The output is 1 if ( = 0 AND = 1) OR ( = 1 AND = 0). |NOT| Invert Power Flow Symbol |NOT| Description |NOT| (Invert Power Flow) negates the RLO bit. Status word Xx 交通大學畢業(yè)設計（論文） BR CC1 CC0 OV OS OR STA RLO /FC writes: 1 x Example The signal state of output is 0 if one of the following conditions exists: The signal state is 1 at input Or the signal state is 1 at inputs and . ( ) Output Coil Symbol address ( ) Parameter Data Type Memory Area Description address BOOL I, Q, M, L, D Assigned bit Description ( ) (Output Coil) works like a coil in a relay logic diagram. If there is power flow to the coil (RLO = 1), the bit at location address is set to 1. If there is no power flow to the coil (RLO = 0), the bit at location address is set to 0. An output coil can only be placed at the rig
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