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which, in a closed loop, is divided by the loop gain available at the frequency of interest. The amplifier should have acceptable loop gain at 500 kHz for use with the AD574A. To check whether the output properties of a signal source are suitable, monitor the AD574’s input with an oscilloscope while a conversion is in progress. Each of the 12 disturbances should subside in sorless. For applications involving the use of a sampleandhold amplifier, the AD585 is remended. The AD711 or AD544 op amps are remended for dc applications. SAMPLEANDHOLD AMPLIFIERSAlthough the conversion time of the AD574A is a maximum of 35 ms, to achieve accurate 12bit conversions of frequencies greater than a few Hz requires the use of a sampleandhold amplifier (SHA). If the voltage of the analog input signal driving the AD574A changes by more than 1/2 LSB over the time interval needed to make a conversion, then the input requires a SHA. The AD585 is a high linearity SHA capable of directly driving the analog input of the AD574A. The AD585’s fast acquisition time, low aperture and low aperture jitter are ideally suited for highspeed data acquisition systems. Consider the AD574A converter with a 35 ms conversion time and an input signal of 10 V pp: the maximum frequency which may be applied to achieve rated accuracy is Hz. However, with the addition of an AD585, as shown in Figure 3, the maximum frequency increases to 26 kHz.The AD585’s low output impedance, fastloop response, and low droop maintain 12bits of accuracy under the changing load conditions that occur during a conversion, making it suitable for use in high accuracy conversion systems. Many other SHAs cannot achieve 12bits of accuracy and can thus promise a system. The AD585 is remended for AD574A applications requiring a sample and hold.Figure 3. AD574A with AD585 Sample and HoldSUPPLY DECOUPLING AND LAYOUTCONSIDERATIONSIt is critically important that the AD574A power supplies be filtered, well regulated, and free from high frequency noise. Use of noisy supplies will cause unstable output codes. Switching power supplies are not remended for circuits attempting to achieve 12bit accuracy unless great care is used in filtering any switching spikes present in the output. Remember that a few millivolts of noise represents several counts of error in a 12bit ADC.Circuit layout should attempt to locate the AD574A, associated analog input circuitry, and interconnections as far as possible from logic circuitry. For this reason, the use of wirewrap circuit construction is not remended. Careful printed circuit construction is preferred.UNIPOLAR RANGE CONNECTIONS FOR THE AD574AThe AD574A contains all the active ponents required to perform a plete 12bit A/D conversion. Thus, for most situations, all that is necessary is connection of the power supplies (+5 V, +12 V/+15 V and –12 V/–15 V), the analog input, and the conversion initiation mand, as discussed on the next page. Analog input connections and calibration are easily acplished。 it can supply up to mA to an external load in addition to the requirements of the reference input resistor ( mA) and bipolar offset resistor (1 mA) when the AD574A is powered from 177。 if more, the bit is turned off. After testing all the bits, the SAR contains a 12bit binary code which accurately represents the input signal to within 1/2 LSB. The temperaturepensated buried Zener reference provides the primary voltage reference to the DAC and guarantees excellent stability with both time and temperature. The reference is trimmed to volts 177。英文原文12Bit A/D ConverterCIRCUIT OPERATIONThe AD574A is a plete 12bit A/D converter which requires no external ponents to provide the plete successive approximation analogtodigital conversion function. A block diagram of the AD574A is shown in Figure 1.Figure 1. Block Diagram of AD574A 12Bit AtoD ConverterWhen the control section is manded to initiate a conversion (as described later), it enables the clock and resets the successiveapproximation register (SAR) to all zeros. Once a conversion cycle has begun, it cannot be stopped or restarted and data is not available from the output buffers. The SAR, timed by the clock, will se