chapter8cpuandmemorydesign,enhancement,and(參考版)
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【正文】 Sons, Inc. The purchaser may make backup copies for his/her own use only and not for distribution or resale. The Publisher assumes no responsibility for errors, omissions, or damages caused by the use of these programs or from the use of the information contained herein.” 831 。 Sons, Inc. Copyright 2020 John Wiley amp。 Sons, Inc. MasterSlave Multiprocessing ? Master CPU ? Manages the system ? Controls all resources and scheduling ? Assigns tasks to slave CPUs ? Advantages ? Simplicity ? Protection of system and data ? Disadvantages ? Master CPU bees a bottleneck ? Reliability issues – if master CPU fails entire system fails 829 Copyright 2020 John Wiley amp。 Sons, Inc. Multiprocessor Systems ? Identical access to programs, data, shared memory, I/O, etc. ? Easily extends multitasking, and redundant program execution ? Two ways to configure ? Masterslave multiprocessing ? Symmetrical multiprocessing (SMP) 827 Copyright 2020 John Wiley amp。 Sons, Inc. 825 Copyright 2020 John Wiley amp。 Sons, Inc. Performance Advantages ? Hit ratios of 90% mon ? 50%+ improved execution speed ? Locality of reference is why caching works ? Most memory references confined to small region of memory at any given time ? Wellwritten program in small loop, procedure or function ? Data likely in array ? Variables stored together 823 Copyright 2020 John Wiley amp。 Sons, Inc. StepbyStep Use of Cache 821 Copyright 2020 John Wiley amp。 Sons, Inc. Memory Interleaving 819 Copyright 2020 John Wiley amp。 Sons, Inc. Memory Enhancements ? Memory is slow pared to CPU processing speeds! ? 2Ghz CPU = 1 cycle in 189。 Sons, Inc. Scalar vs. Superscalar Processing 816 Copyright 2020 John Wiley amp。 Sons, Inc. Supersc
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